Tom Thomas

Array ( [id] => 2708141 [patent_doc_number] => 05017506 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-05-21 [patent_title] => 'Method for fabricating a trench DRAM' [patent_app_type] => 1 [patent_app_number] => 7/385344 [patent_app_country] => US [patent_app_date] => 1989-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 39 [patent_no_of_words] => 6439 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/017/05017506.pdf [firstpage_image] =>[orig_patent_app_number] => 385344 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2657935 [patent_doc_number] => 04978634 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-12-18 [patent_title] => 'Method of making trench DRAM cell with stacked capacitor and buried lateral contact' [patent_app_type] => 1 [patent_app_number] => 7/385327 [patent_app_country] => US [patent_app_date] => 1989-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 39 [patent_no_of_words] => 6439 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/978/04978634.pdf [firstpage_image] =>[orig_patent_app_number] => 385327 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2744951 [patent_doc_number] => 04987090 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-01-22 [patent_title] => 'Static ram cell with trench pull-down transistors and buried-layer ground plate' [patent_app_type] => 1 [patent_app_number] => 7/385900 [patent_app_country] => US [patent_app_date] => 1989-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 11 [patent_no_of_words] => 2614 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/987/04987090.pdf [firstpage_image] =>[orig_patent_app_number] => 385900 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2733855 [patent_doc_number] => 04997783 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-03-05 [patent_title] => 'Static ram cell with trench pull-down transistors and buried-layer ground plate' [patent_app_type] => 1 [patent_app_number] => 7/385663 [patent_app_country] => US [patent_app_date] => 1989-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 18 [patent_no_of_words] => 3404 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/997/04997783.pdf [firstpage_image] =>[orig_patent_app_number] => 385663 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2714431 [patent_doc_number] => 05008214 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-04-16 [patent_title] => 'Method of making crosspoint dynamic RAM cell array with overlapping wordlines and folded bitlines' [patent_app_type] => 1 [patent_app_number] => 7/384858 [patent_app_country] => US [patent_app_date] => 1989-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 2120 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/008/05008214.pdf [firstpage_image] =>[orig_patent_app_number] => 384858 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2761920 [patent_doc_number] => 04994409 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-02-19 [patent_title] => 'Method for manufacturing a trench capacitor using a photoresist etch back process' [patent_app_type] => 1 [patent_app_number] => 7/381288 [patent_app_country] => US [patent_app_date] => 1989-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 10 [patent_no_of_words] => 3230 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/994/04994409.pdf [firstpage_image] =>[orig_patent_app_number] => 381288 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2556525 [patent_doc_number] => 04960724 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-10-02 [patent_title] => 'Method for deleting unused gates and method for manufacturing master-slice semiconductor integrated circuit device using the deleting method' [patent_app_type] => 1 [patent_app_number] => 7/378143 [patent_app_country] => US [patent_app_date] => 1989-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 5392 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/960/04960724.pdf [firstpage_image] =>[orig_patent_app_number] => 378143 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2632395 [patent_doc_number] => 04977102 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-12-11 [patent_title] => 'Method of producing layer structure of a memory cell for a dynamic random access memory device' [patent_app_type] => 1 [patent_app_number] => 7/377002 [patent_app_country] => US [patent_app_date] => 1989-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 21 [patent_no_of_words] => 3457 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/977/04977102.pdf [firstpage_image] =>[orig_patent_app_number] => 377002 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2750820 [patent_doc_number] => 05071783 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-12-10 [patent_title] => 'Method of producing a dynamic random access memory device' [patent_app_type] => 1 [patent_app_number] => 7/376470 [patent_app_country] => US [patent_app_date] => 1989-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 59 [patent_figures_cnt] => 119 [patent_no_of_words] => 14051 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/071/05071783.pdf [firstpage_image] =>[orig_patent_app_number] => 376470 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2799155 [patent_doc_number] => 05139963 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-08-18 [patent_title] => 'Method and a system for assisting mending of a semiconductor integrated circuit, and a wiring structure and a wiring method suited for mending a semiconductor integrated circuit' [patent_app_type] => 1 [patent_app_number] => 7/372833 [patent_app_country] => US [patent_app_date] => 1989-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 23 [patent_no_of_words] => 11992 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/139/05139963.pdf [firstpage_image] =>[orig_patent_app_number] => 372833 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2693362 [patent_doc_number] => 04990463 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-02-05 [patent_title] => 'Method of manufacturing capacitor' [patent_app_type] => 1 [patent_app_number] => 7/373289 [patent_app_country] => US [patent_app_date] => 1989-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 2258 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/990/04990463.pdf [firstpage_image] =>[orig_patent_app_number] => 373289 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2587830 [patent_doc_number] => 04927782 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-05-22 [patent_title] => 'Method of making self-aligned GaAs/AlGaAs FET\'s' [patent_app_type] => 1 [patent_app_number] => 7/371778 [patent_app_country] => US [patent_app_date] => 1989-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2842 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 275 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/927/04927782.pdf [firstpage_image] =>[orig_patent_app_number] => 371778 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2816543 [patent_doc_number] => 05081059 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-01-14 [patent_title] => 'Method of forming semiconductor integrated circuit using master slice approach' [patent_app_type] => 1 [patent_app_number] => 7/366486 [patent_app_country] => US [patent_app_date] => 1989-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 41 [patent_no_of_words] => 2772 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 351 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/081/05081059.pdf [firstpage_image] =>[orig_patent_app_number] => 366486 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2644904 [patent_doc_number] => 04980309 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-12-25 [patent_title] => 'Method of making high density EEPROM' [patent_app_type] => 1 [patent_app_number] => 7/366795 [patent_app_country] => US [patent_app_date] => 1989-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 4441 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/980/04980309.pdf [firstpage_image] =>[orig_patent_app_number] => 366795 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2567658 [patent_doc_number] => 04900691 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-02-13 [patent_title] => 'Method of fabrication for optical storage apparatus' [patent_app_type] => 1 [patent_app_number] => 7/366865 [patent_app_country] => US [patent_app_date] => 1989-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3935 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/900/04900691.pdf [firstpage_image] =>[orig_patent_app_number] => 366865 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2828705 [patent_doc_number] => 05128283 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-07 [patent_title] => 'Method of forming mask alignment marks' [patent_app_type] => 1 [patent_app_number] => 7/363124 [patent_app_country] => US [patent_app_date] => 1989-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 27 [patent_no_of_words] => 3580 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/128/05128283.pdf [firstpage_image] =>[orig_patent_app_number] => 363124 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2636323 [patent_doc_number] => 04914050 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-04-03 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => 1 [patent_app_number] => 7/362653 [patent_app_country] => US [patent_app_date] => 1989-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4149 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/914/04914050.pdf [firstpage_image] =>[orig_patent_app_number] => 362653 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2636058 [patent_doc_number] => 04910162 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-03-20 [patent_title] => 'Method of manufacturing decoder circuit' [patent_app_type] => 1 [patent_app_number] => 7/361347 [patent_app_country] => US [patent_app_date] => 1989-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 19 [patent_no_of_words] => 7936 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 353 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/910/04910162.pdf [firstpage_image] =>[orig_patent_app_number] => 361347 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2713075 [patent_doc_number] => 05053349 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-01 [patent_title] => 'Method for interconnecting semiconductor devices' [patent_app_type] => 1 [patent_app_number] => 7/360278 [patent_app_country] => US [patent_app_date] => 1989-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 11 [patent_no_of_words] => 2959 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/053/05053349.pdf [firstpage_image] =>[orig_patent_app_number] => 360278 [rel_patent_id] =>[rel_patent_doc_number] =>)