Tom Thomas

Array ( [id] => 2747902 [patent_doc_number] => 05030588 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-07-09 [patent_title] => 'Method of making semiconductor device with film resistor' [patent_app_type] => 1 [patent_app_number] => 7/332810 [patent_app_country] => US [patent_app_date] => 1989-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 11 [patent_no_of_words] => 2457 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/030/05030588.pdf [firstpage_image] =>[orig_patent_app_number] => 332810 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2712722 [patent_doc_number] => 05010025 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-04-23 [patent_title] => 'Method of making trench JFET integrated circuit elements' [patent_app_type] => 1 [patent_app_number] => 7/331952 [patent_app_country] => US [patent_app_date] => 1989-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 17 [patent_no_of_words] => 4097 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/010/05010025.pdf [firstpage_image] =>[orig_patent_app_number] => 331952 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2771686 [patent_doc_number] => 05075249 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-12-24 [patent_title] => 'Method of making a BIC memory cell having contact openings with straight sidewalls and sharp-edge rims' [patent_app_type] => 1 [patent_app_number] => 7/331193 [patent_app_country] => US [patent_app_date] => 1989-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 35 [patent_no_of_words] => 5196 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 452 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/075/05075249.pdf [firstpage_image] =>[orig_patent_app_number] => 331193 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2671542 [patent_doc_number] => 05073511 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-12-17 [patent_title] => 'Method for manufacturing a conductivity modulation MOS semiconductor power device (HIMOS)' [patent_app_type] => 1 [patent_app_number] => 7/330182 [patent_app_country] => US [patent_app_date] => 1989-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 11 [patent_no_of_words] => 1565 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/073/05073511.pdf [firstpage_image] =>[orig_patent_app_number] => 330182 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2479458 [patent_doc_number] => 04882295 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-11-21 [patent_title] => 'Method of making a double injection field effect transistor' [patent_app_type] => 1 [patent_app_number] => 7/328666 [patent_app_country] => US [patent_app_date] => 1989-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 20 [patent_no_of_words] => 11299 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/882/04882295.pdf [firstpage_image] =>[orig_patent_app_number] => 328666 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2705908 [patent_doc_number] => 05013678 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-05-07 [patent_title] => 'Method of making an integrated circuit comprising load resistors arranged on the field oxide zones which separate the active transistor zones' [patent_app_type] => 1 [patent_app_number] => 7/305193 [patent_app_country] => US [patent_app_date] => 1989-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 5 [patent_no_of_words] => 1770 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 259 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/013/05013678.pdf [firstpage_image] =>[orig_patent_app_number] => 305193 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2516455 [patent_doc_number] => 04870028 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-09-26 [patent_title] => 'Method of making double gate static induction thyristor' [patent_app_type] => 1 [patent_app_number] => 7/322515 [patent_app_country] => US [patent_app_date] => 1989-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 12 [patent_no_of_words] => 3968 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/870/04870028.pdf [firstpage_image] =>[orig_patent_app_number] => 322515 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2871261 [patent_doc_number] => 05091329 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-02-25 [patent_title] => 'Method for programming MOS and CMOS ROM memories' [patent_app_type] => 1 [patent_app_number] => 7/322132 [patent_app_country] => US [patent_app_date] => 1989-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 5 [patent_no_of_words] => 2622 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/091/05091329.pdf [firstpage_image] =>[orig_patent_app_number] => 322132 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2793187 [patent_doc_number] => 05143861 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-01 [patent_title] => 'Method making a dynamic random access memory cell with a tungsten plug' [patent_app_type] => 1 [patent_app_number] => 7/320064 [patent_app_country] => US [patent_app_date] => 1989-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 3615 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 297 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/143/05143861.pdf [firstpage_image] =>[orig_patent_app_number] => 320064 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2822797 [patent_doc_number] => 05168075 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-12-01 [patent_title] => 'Random access memory cell with implanted capacitor region' [patent_app_type] => 1 [patent_app_number] => 7/317899 [patent_app_country] => US [patent_app_date] => 1989-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 20 [patent_no_of_words] => 3871 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/168/05168075.pdf [firstpage_image] =>[orig_patent_app_number] => 317899 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2693595 [patent_doc_number] => 05019519 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-05-28 [patent_title] => 'Method for the manufacture of optical semiconductor device' [patent_app_type] => 1 [patent_app_number] => 7/316865 [patent_app_country] => US [patent_app_date] => 1989-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 23 [patent_no_of_words] => 3975 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/019/05019519.pdf [firstpage_image] =>[orig_patent_app_number] => 316865 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2708121 [patent_doc_number] => 05017505 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-05-21 [patent_title] => 'Method of making a nonvolatile semiconductor memory apparatus with a floating gate' [patent_app_type] => 1 [patent_app_number] => 7/313898 [patent_app_country] => US [patent_app_date] => 1989-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 3426 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/017/05017505.pdf [firstpage_image] =>[orig_patent_app_number] => 313898 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2526657 [patent_doc_number] => 04888299 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-12-19 [patent_title] => 'Routing among field effect transistors' [patent_app_type] => 1 [patent_app_number] => 7/313627 [patent_app_country] => US [patent_app_date] => 1989-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 2260 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/888/04888299.pdf [firstpage_image] =>[orig_patent_app_number] => 313627 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2733802 [patent_doc_number] => 04997781 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-03-05 [patent_title] => 'Method of making planarized EPROM array' [patent_app_type] => 1 [patent_app_number] => 7/310999 [patent_app_country] => US [patent_app_date] => 1989-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 2197 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/997/04997781.pdf [firstpage_image] =>[orig_patent_app_number] => 310999 [rel_patent_id] =>[rel_patent_doc_number] =>)