Tom Thomas

Array ( [id] => 2551125 [patent_doc_number] => 04833094 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-05-23 [patent_title] => 'Method of making a dynamic ram cell having shared trench storage capacitor with sidewall-defined bridge contacts and gate electrodes' [patent_app_type] => 1 [patent_app_number] => 7/238002 [patent_app_country] => US [patent_app_date] => 1988-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 6632 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/833/04833094.pdf [firstpage_image] =>[orig_patent_app_number] => 238002 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2636041 [patent_doc_number] => 04910161 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-03-20 [patent_title] => 'Method of making a semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 7/237000 [patent_app_country] => US [patent_app_date] => 1988-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3666 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/910/04910161.pdf [firstpage_image] =>[orig_patent_app_number] => 237000 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2482236 [patent_doc_number] => 04866004 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-09-12 [patent_title] => 'Method of forming groove isolation filled with dielectric for semiconductor device' [patent_app_type] => 1 [patent_app_number] => 7/236319 [patent_app_country] => US [patent_app_date] => 1988-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 25 [patent_no_of_words] => 3523 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 346 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/866/04866004.pdf [firstpage_image] =>[orig_patent_app_number] => 236319 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2478046 [patent_doc_number] => 04876215 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-10-24 [patent_title] => 'Method of making a static ram cell with trench pull-down transistors and buried-layer ground plate' [patent_app_type] => 1 [patent_app_number] => 7/236209 [patent_app_country] => US [patent_app_date] => 1988-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 12 [patent_no_of_words] => 2725 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/876/04876215.pdf [firstpage_image] =>[orig_patent_app_number] => 236209 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2732808 [patent_doc_number] => 05032532 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-07-16 [patent_title] => 'Method for fabricating insulated gate semiconductor device' [patent_app_type] => 1 [patent_app_number] => 7/233007 [patent_app_country] => US [patent_app_date] => 1988-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 19 [patent_no_of_words] => 3615 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/032/05032532.pdf [firstpage_image] =>[orig_patent_app_number] => 233007 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2486389 [patent_doc_number] => 04868134 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-09-19 [patent_title] => 'Method of making a variable-capacitance diode device' [patent_app_type] => 1 [patent_app_number] => 7/233064 [patent_app_country] => US [patent_app_date] => 1988-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3139 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/868/04868134.pdf [firstpage_image] =>[orig_patent_app_number] => 233064 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2488524 [patent_doc_number] => 04859622 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-08-22 [patent_title] => 'Method of making a trench capacitor for dram' [patent_app_type] => 1 [patent_app_number] => 7/227333 [patent_app_country] => US [patent_app_date] => 1988-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 36 [patent_no_of_words] => 3665 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 282 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/859/04859622.pdf [firstpage_image] =>[orig_patent_app_number] => 227333 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2511274 [patent_doc_number] => 04851365 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-07-25 [patent_title] => 'Process for the production of a memory cell' [patent_app_type] => 1 [patent_app_number] => 7/216869 [patent_app_country] => US [patent_app_date] => 1988-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 4663 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 341 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/851/04851365.pdf [firstpage_image] =>[orig_patent_app_number] => 216869 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2709350 [patent_doc_number] => 05061654 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-29 [patent_title] => 'Semiconductor integrated circuit having oxide regions with different thickness' [patent_app_type] => 1 [patent_app_number] => 7/213497 [patent_app_country] => US [patent_app_date] => 1988-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 28 [patent_no_of_words] => 5186 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 296 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/061/05061654.pdf [firstpage_image] =>[orig_patent_app_number] => 213497 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2528553 [patent_doc_number] => 04839305 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-06-13 [patent_title] => 'Method of making single polysilicon self-aligned transistor' [patent_app_type] => 1 [patent_app_number] => 7/212554 [patent_app_country] => US [patent_app_date] => 1988-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 10 [patent_no_of_words] => 2299 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/839/04839305.pdf [firstpage_image] =>[orig_patent_app_number] => 212554 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2596024 [patent_doc_number] => 04921815 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-05-01 [patent_title] => 'Method of producing a semiconductor memory device having trench capacitors' [patent_app_type] => 1 [patent_app_number] => 7/203931 [patent_app_country] => US [patent_app_date] => 1988-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 3743 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/921/04921815.pdf [firstpage_image] =>[orig_patent_app_number] => 203931 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2515845 [patent_doc_number] => 04874714 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-10-17 [patent_title] => 'Method of making laterally oriented Schottky diode' [patent_app_type] => 1 [patent_app_number] => 7/201506 [patent_app_country] => US [patent_app_date] => 1988-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 4133 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/874/04874714.pdf [firstpage_image] =>[orig_patent_app_number] => 201506 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2474635 [patent_doc_number] => 04879255 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-11-07 [patent_title] => 'Method for fabricating bipolar-MOS devices' [patent_app_type] => 1 [patent_app_number] => 7/200863 [patent_app_country] => US [patent_app_date] => 1988-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 4146 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 530 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/879/04879255.pdf [firstpage_image] =>[orig_patent_app_number] => 200863 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2634769 [patent_doc_number] => 04892838 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-01-09 [patent_title] => 'Method of manufacturing an insulated gate field effect transistor' [patent_app_type] => 1 [patent_app_number] => 7/197542 [patent_app_country] => US [patent_app_date] => 1988-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 6561 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/892/04892838.pdf [firstpage_image] =>[orig_patent_app_number] => 197542 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2646154 [patent_doc_number] => 04895810 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-01-23 [patent_title] => 'Iopographic pattern delineated power mosfet with profile tailored recessed source' [patent_app_type] => 1 [patent_app_number] => 7/194874 [patent_app_country] => US [patent_app_date] => 1988-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 21 [patent_no_of_words] => 7296 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/895/04895810.pdf [firstpage_image] =>[orig_patent_app_number] => 194874 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2559632 [patent_doc_number] => 04837175 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-06-06 [patent_title] => 'Making a buried channel FET with lateral growth over amorphous region' [patent_app_type] => 1 [patent_app_number] => 7/194532 [patent_app_country] => US [patent_app_date] => 1988-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 36 [patent_no_of_words] => 8521 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 328 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/837/04837175.pdf [firstpage_image] =>[orig_patent_app_number] => 194532 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2491125 [patent_doc_number] => 04843025 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-06-27 [patent_title] => 'Method of fabricating trench cell capacitors on a semocondcutor substrate' [patent_app_type] => 1 [patent_app_number] => 7/194262 [patent_app_country] => US [patent_app_date] => 1988-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 2385 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/843/04843025.pdf [firstpage_image] =>[orig_patent_app_number] => 194262 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2636234 [patent_doc_number] => 04914045 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-04-03 [patent_title] => 'Method of fabricating packaged TRIAC and trigger switch' [patent_app_type] => 1 [patent_app_number] => 7/193193 [patent_app_country] => US [patent_app_date] => 1988-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2259 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/914/04914045.pdf [firstpage_image] =>[orig_patent_app_number] => 193193 [rel_patent_id] =>[rel_patent_doc_number] =>)