Search

Tomi Sweet Skibinski

Examiner (ID: 5162)

Most Active Art Unit
2842
Art Unit(s)
2842, 2816
Total Applications
1555
Issued Applications
1363
Pending Applications
78
Abandoned Applications
150

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9845232 [patent_doc_number] => 08947156 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-03 [patent_title] => 'High-voltage bulk driver using bypass circuit' [patent_app_type] => utility [patent_app_number] => 14/074334 [patent_app_country] => US [patent_app_date] => 2013-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4327 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14074334 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/074334
High-voltage bulk driver using bypass circuit Nov 6, 2013 Issued
Array ( [id] => 10578698 [patent_doc_number] => 09301365 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-29 [patent_title] => 'Luminaire with switch-mode converter power monitoring' [patent_app_type] => utility [patent_app_number] => 14/074166 [patent_app_country] => US [patent_app_date] => 2013-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 18736 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14074166 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/074166
Luminaire with switch-mode converter power monitoring Nov 6, 2013 Issued
Array ( [id] => 10845383 [patent_doc_number] => 08872566 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-28 [patent_title] => 'Integrated circuit having latch circuits and using delay circuits to fetch data bits in synchronization with clock signals' [patent_app_type] => utility [patent_app_number] => 14/068066 [patent_app_country] => US [patent_app_date] => 2013-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9173 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14068066 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/068066
Integrated circuit having latch circuits and using delay circuits to fetch data bits in synchronization with clock signals Oct 30, 2013 Issued
Array ( [id] => 10845383 [patent_doc_number] => 08872566 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-28 [patent_title] => 'Integrated circuit having latch circuits and using delay circuits to fetch data bits in synchronization with clock signals' [patent_app_type] => utility [patent_app_number] => 14/068066 [patent_app_country] => US [patent_app_date] => 2013-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9173 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14068066 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/068066
Integrated circuit having latch circuits and using delay circuits to fetch data bits in synchronization with clock signals Oct 30, 2013 Issued
Array ( [id] => 10845383 [patent_doc_number] => 08872566 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-28 [patent_title] => 'Integrated circuit having latch circuits and using delay circuits to fetch data bits in synchronization with clock signals' [patent_app_type] => utility [patent_app_number] => 14/068066 [patent_app_country] => US [patent_app_date] => 2013-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9173 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14068066 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/068066
Integrated circuit having latch circuits and using delay circuits to fetch data bits in synchronization with clock signals Oct 30, 2013 Issued
Array ( [id] => 10845383 [patent_doc_number] => 08872566 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-28 [patent_title] => 'Integrated circuit having latch circuits and using delay circuits to fetch data bits in synchronization with clock signals' [patent_app_type] => utility [patent_app_number] => 14/068066 [patent_app_country] => US [patent_app_date] => 2013-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9173 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14068066 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/068066
Integrated circuit having latch circuits and using delay circuits to fetch data bits in synchronization with clock signals Oct 30, 2013 Issued
Array ( [id] => 9474855 [patent_doc_number] => 20140132318 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-15 [patent_title] => 'PLL LOCKING CONTROL IN DAISY CHAINED MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/066748 [patent_app_country] => US [patent_app_date] => 2013-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 3680 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14066748 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/066748
PLL locking control in daisy chained memory system Oct 29, 2013 Issued
Array ( [id] => 10231013 [patent_doc_number] => 20150116007 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-30 [patent_title] => 'VOLTAGE CLAMP ASSIST CIRCUIT' [patent_app_type] => utility [patent_app_number] => 14/064646 [patent_app_country] => US [patent_app_date] => 2013-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2309 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14064646 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/064646
Voltage clamp assist circuit Oct 27, 2013 Issued
Array ( [id] => 11288227 [patent_doc_number] => 09504099 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-22 [patent_title] => 'Lighting system with flexible lighting sheet and intelligent light bulb base' [patent_app_type] => utility [patent_app_number] => 14/063006 [patent_app_country] => US [patent_app_date] => 2013-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 60 [patent_figures_cnt] => 131 [patent_no_of_words] => 40100 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14063006 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/063006
Lighting system with flexible lighting sheet and intelligent light bulb base Oct 24, 2013 Issued
Array ( [id] => 10413546 [patent_doc_number] => 20150298556 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-22 [patent_title] => 'POWER SUPPLY DEVICE FOR VEHICLE' [patent_app_type] => utility [patent_app_number] => 14/435440 [patent_app_country] => US [patent_app_date] => 2013-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5054 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14435440 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/435440
POWER SUPPLY DEVICE FOR VEHICLE Oct 23, 2013 Abandoned
Array ( [id] => 12517575 [patent_doc_number] => 10003330 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-06-19 [patent_title] => IGBT driver module and method therefor [patent_app_type] => utility [patent_app_number] => 15/028623 [patent_app_country] => US [patent_app_date] => 2013-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 8814 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15028623 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/028623
IGBT driver module and method therefor Oct 17, 2013 Issued
Array ( [id] => 9433359 [patent_doc_number] => 20140111265 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-24 [patent_title] => 'DELAY CIRCUIT' [patent_app_type] => utility [patent_app_number] => 14/054907 [patent_app_country] => US [patent_app_date] => 2013-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2880 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14054907 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/054907
Asymmetric delay circuit Oct 15, 2013 Issued
Array ( [id] => 9419343 [patent_doc_number] => 20140103993 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-17 [patent_title] => 'CHIP DYNAMIC VOLTAGE REGULATOR CIRCUIT AND TERMINAL DEVICE' [patent_app_type] => utility [patent_app_number] => 14/051524 [patent_app_country] => US [patent_app_date] => 2013-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3574 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14051524 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/051524
CHIP DYNAMIC VOLTAGE REGULATOR CIRCUIT AND TERMINAL DEVICE Oct 10, 2013 Abandoned
Array ( [id] => 10858469 [patent_doc_number] => 08884673 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-11-11 [patent_title] => 'Clock trimming apparatus and associated clock trimming method' [patent_app_type] => utility [patent_app_number] => 14/045883 [patent_app_country] => US [patent_app_date] => 2013-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 5167 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14045883 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/045883
Clock trimming apparatus and associated clock trimming method Oct 3, 2013 Issued
Array ( [id] => 10871157 [patent_doc_number] => 08896362 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-25 [patent_title] => 'Control circuit for controlling a push-pull circuit and method thereof' [patent_app_type] => utility [patent_app_number] => 14/045772 [patent_app_country] => US [patent_app_date] => 2013-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4791 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14045772 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/045772
Control circuit for controlling a push-pull circuit and method thereof Oct 2, 2013 Issued
Array ( [id] => 10888841 [patent_doc_number] => 08912837 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-16 [patent_title] => 'Mux-based digital delay interpolator' [patent_app_type] => utility [patent_app_number] => 14/045284 [patent_app_country] => US [patent_app_date] => 2013-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 3081 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14045284 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/045284
Mux-based digital delay interpolator Oct 2, 2013 Issued
Array ( [id] => 9996854 [patent_doc_number] => 09041456 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-05-26 [patent_title] => 'Power semiconductor device' [patent_app_type] => utility [patent_app_number] => 14/043586 [patent_app_country] => US [patent_app_date] => 2013-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 23 [patent_no_of_words] => 9413 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 461 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14043586 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/043586
Power semiconductor device Sep 30, 2013 Issued
Array ( [id] => 10410404 [patent_doc_number] => 20150295414 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-15 [patent_title] => 'METHOD FOR DISTRIBUTING A POWER AMONG A PLURALITY OF CONSUMER UNITS OF A RAIL VEHICLE' [patent_app_type] => utility [patent_app_number] => 14/434173 [patent_app_country] => US [patent_app_date] => 2013-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5269 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14434173 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/434173
METHOD FOR DISTRIBUTING A POWER AMONG A PLURALITY OF CONSUMER UNITS OF A RAIL VEHICLE Sep 30, 2013 Abandoned
Array ( [id] => 9869946 [patent_doc_number] => 08957722 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-17 [patent_title] => 'Wideband double balanced image reject mixer' [patent_app_type] => utility [patent_app_number] => 14/042054 [patent_app_country] => US [patent_app_date] => 2013-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6102 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14042054 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/042054
Wideband double balanced image reject mixer Sep 29, 2013 Issued
Array ( [id] => 9278394 [patent_doc_number] => 20140028362 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-30 [patent_title] => 'INPUT CIRCUIT' [patent_app_type] => utility [patent_app_number] => 14/040519 [patent_app_country] => US [patent_app_date] => 2013-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7066 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14040519 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/040519
Input circuit Sep 26, 2013 Issued
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