Search

Tong-ho Kim

Examiner (ID: 282, Phone: (571)270-0276 , Office: P/2811 )

Most Active Art Unit
2811
Art Unit(s)
2811
Total Applications
1305
Issued Applications
1141
Pending Applications
141
Abandoned Applications
52

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16966288 [patent_doc_number] => 20210217787 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-15 [patent_title] => IMAGING DEVICE AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/217556 [patent_app_country] => US [patent_app_date] => 2021-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9851 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17217556 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/217556
IMAGING DEVICE AND ELECTRONIC DEVICE Mar 29, 2021 Abandoned
Array ( [id] => 17263179 [patent_doc_number] => 20210376164 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => SEMICONDUCTING METAL OXIDE TRANSISTORS HAVING A PATTERNED GATE AND METHODS FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/216747 [patent_app_country] => US [patent_app_date] => 2021-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13763 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17216747 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/216747
Semiconducting metal oxide transistors having a patterned gate and methods for forming the same Mar 29, 2021 Issued
Array ( [id] => 18704793 [patent_doc_number] => 11791311 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-17 [patent_title] => Electronic device [patent_app_type] => utility [patent_app_number] => 17/216621 [patent_app_country] => US [patent_app_date] => 2021-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 44 [patent_no_of_words] => 17105 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17216621 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/216621
Electronic device Mar 28, 2021 Issued
Array ( [id] => 17900922 [patent_doc_number] => 20220310584 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => ACTIVE ZONES WITH OFFSET IN SEMICONDUCTOR CELL [patent_app_type] => utility [patent_app_number] => 17/213980 [patent_app_country] => US [patent_app_date] => 2021-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12583 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17213980 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/213980
Active zones with offset in semiconductor cell Mar 25, 2021 Issued
Array ( [id] => 18669944 [patent_doc_number] => 11776856 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-03 [patent_title] => Nanosheet transistors with different gate materials in same stack and method of making [patent_app_type] => utility [patent_app_number] => 17/212311 [patent_app_country] => US [patent_app_date] => 2021-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 12498 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 281 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17212311 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/212311
Nanosheet transistors with different gate materials in same stack and method of making Mar 24, 2021 Issued
Array ( [id] => 18481190 [patent_doc_number] => 11694945 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-04 [patent_title] => Lead frame package having conductive surfaces [patent_app_type] => utility [patent_app_number] => 17/301095 [patent_app_country] => US [patent_app_date] => 2021-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 4558 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17301095 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/301095
Lead frame package having conductive surfaces Mar 23, 2021 Issued
Array ( [id] => 17886780 [patent_doc_number] => 20220302258 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-22 [patent_title] => SEMICONDUCTOR DEVICE STRUCTURE AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/206018 [patent_app_country] => US [patent_app_date] => 2021-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9644 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17206018 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/206018
Semiconductor device structure and methods of forming the same Mar 17, 2021 Issued
Array ( [id] => 18623781 [patent_doc_number] => 11756837 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-12 [patent_title] => Hybrid nanosheet tunnel-FET/CMOS technology [patent_app_type] => utility [patent_app_number] => 17/204016 [patent_app_country] => US [patent_app_date] => 2021-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5254 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17204016 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/204016
Hybrid nanosheet tunnel-FET/CMOS technology Mar 16, 2021 Issued
Array ( [id] => 18357935 [patent_doc_number] => 11646342 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-09 [patent_title] => Imaging device and electronic device [patent_app_type] => utility [patent_app_number] => 17/202929 [patent_app_country] => US [patent_app_date] => 2021-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 42 [patent_no_of_words] => 14732 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17202929 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/202929
Imaging device and electronic device Mar 15, 2021 Issued
Array ( [id] => 17347192 [patent_doc_number] => 20220013523 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-13 [patent_title] => CAPACITOR, MEMORY DEVICE, AND METHOD [patent_app_type] => utility [patent_app_number] => 17/196221 [patent_app_country] => US [patent_app_date] => 2021-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21185 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17196221 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/196221
Capacitor, memory device, and method Mar 8, 2021 Issued
Array ( [id] => 16951697 [patent_doc_number] => 20210210389 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-08 [patent_title] => SEMICONDUCTOR DEVICE WITH FIN STRUCTURES [patent_app_type] => utility [patent_app_number] => 17/194910 [patent_app_country] => US [patent_app_date] => 2021-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7334 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17194910 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/194910
Semiconductor device with fin structures Mar 7, 2021 Issued
Array ( [id] => 17319209 [patent_doc_number] => 20210408259 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => GATE STRUCTURE AND METHOD [patent_app_type] => utility [patent_app_number] => 17/194688 [patent_app_country] => US [patent_app_date] => 2021-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18434 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17194688 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/194688
Gate structure and method Mar 7, 2021 Issued
Array ( [id] => 17278115 [patent_doc_number] => 20210384313 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-09 [patent_title] => GATE STRUCTURE AND METHOD [patent_app_type] => utility [patent_app_number] => 17/190888 [patent_app_country] => US [patent_app_date] => 2021-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11442 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17190888 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/190888
Gate structure and method Mar 2, 2021 Issued
Array ( [id] => 18263280 [patent_doc_number] => 11610989 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-21 [patent_title] => High electron mobility transistor [patent_app_type] => utility [patent_app_number] => 17/191598 [patent_app_country] => US [patent_app_date] => 2021-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3287 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17191598 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/191598
High electron mobility transistor Mar 2, 2021 Issued
Array ( [id] => 18464489 [patent_doc_number] => 11688786 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-27 [patent_title] => Semiconductor device and method [patent_app_type] => utility [patent_app_number] => 17/189779 [patent_app_country] => US [patent_app_date] => 2021-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 43 [patent_no_of_words] => 14123 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17189779 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/189779
Semiconductor device and method Mar 1, 2021 Issued
Array ( [id] => 18735731 [patent_doc_number] => 11804472 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-31 [patent_title] => Semiconductor device, semiconductor package and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/190113 [patent_app_country] => US [patent_app_date] => 2021-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 9264 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17190113 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/190113
Semiconductor device, semiconductor package and method of manufacturing the same Mar 1, 2021 Issued
Array ( [id] => 17855322 [patent_doc_number] => 20220285365 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-08 [patent_title] => VERTICAL CONTACTS FOR SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 17/189485 [patent_app_country] => US [patent_app_date] => 2021-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15734 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17189485 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/189485
Vertical contacts for semiconductor devices Mar 1, 2021 Issued
Array ( [id] => 18494318 [patent_doc_number] => 11699740 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-11 [patent_title] => Electroless plating method for metal gate fill [patent_app_type] => utility [patent_app_number] => 17/190267 [patent_app_country] => US [patent_app_date] => 2021-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 80 [patent_figures_cnt] => 92 [patent_no_of_words] => 15726 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17190267 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/190267
Electroless plating method for metal gate fill Mar 1, 2021 Issued
Array ( [id] => 16904813 [patent_doc_number] => 20210183729 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-17 [patent_title] => METHOD OF FORMING A THERMAL SHIELD IN A MONOLITHIC 3-D INTEGRATED CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/189777 [patent_app_country] => US [patent_app_date] => 2021-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12475 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17189777 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/189777
Method of forming a thermal shield in a monolithic 3-d integrated circuit Mar 1, 2021 Issued
Array ( [id] => 17840920 [patent_doc_number] => 20220278226 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-01 [patent_title] => Method of Making Nanosheet Local Capacitors and NVM Devices [patent_app_type] => utility [patent_app_number] => 17/188868 [patent_app_country] => US [patent_app_date] => 2021-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13496 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17188868 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/188868
Method of making nanosheet local capacitors and nvm devices Feb 28, 2021 Issued
Menu