Search

Tong-ho Kim

Examiner (ID: 282, Phone: (571)270-0276 , Office: P/2811 )

Most Active Art Unit
2811
Art Unit(s)
2811
Total Applications
1305
Issued Applications
1141
Pending Applications
141
Abandoned Applications
52

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16904795 [patent_doc_number] => 20210183711 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-17 [patent_title] => SELF-ALIGNED CONTACTS FOR NANOSHEET FIELD EFFECT TRANSISTOR DEVICES [patent_app_type] => utility [patent_app_number] => 17/110604 [patent_app_country] => US [patent_app_date] => 2020-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5619 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17110604 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/110604
Self-aligned contacts for nanosheet field effect transistor devices Dec 2, 2020 Issued
Array ( [id] => 17145314 [patent_doc_number] => 20210313327 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-07 [patent_title] => UNIFIED ARCHITECTURAL DESIGN FOR ENHANCED 3D CIRCUIT OPTIONS [patent_app_type] => utility [patent_app_number] => 17/109860 [patent_app_country] => US [patent_app_date] => 2020-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8107 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17109860 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/109860
Unified architectural design for enhanced 3D circuit options Dec 1, 2020 Issued
Array ( [id] => 17971399 [patent_doc_number] => 11488948 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-01 [patent_title] => Semiconductor devices, layout design methods for the same, and methods for fabricating the same [patent_app_type] => utility [patent_app_number] => 17/109912 [patent_app_country] => US [patent_app_date] => 2020-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 14518 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17109912 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/109912
Semiconductor devices, layout design methods for the same, and methods for fabricating the same Dec 1, 2020 Issued
Array ( [id] => 18032152 [patent_doc_number] => 11515352 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-29 [patent_title] => Image-capture element and image capture device [patent_app_type] => utility [patent_app_number] => 17/108460 [patent_app_country] => US [patent_app_date] => 2020-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 39 [patent_no_of_words] => 10870 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17108460 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/108460
Image-capture element and image capture device Nov 30, 2020 Issued
Array ( [id] => 18001072 [patent_doc_number] => 11502183 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-15 [patent_title] => Air gap in inner spacers and methods of fabricating the same in field-effect transistors [patent_app_type] => utility [patent_app_number] => 17/107374 [patent_app_country] => US [patent_app_date] => 2020-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 21 [patent_no_of_words] => 8288 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17107374 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/107374
Air gap in inner spacers and methods of fabricating the same in field-effect transistors Nov 29, 2020 Issued
Array ( [id] => 17941879 [patent_doc_number] => 11476341 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-18 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/105868 [patent_app_country] => US [patent_app_date] => 2020-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 9849 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17105868 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/105868
Semiconductor device Nov 26, 2020 Issued
Array ( [id] => 17878639 [patent_doc_number] => 11450663 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-20 [patent_title] => Semiconductor device structure and methods of forming the same [patent_app_type] => utility [patent_app_number] => 17/104891 [patent_app_country] => US [patent_app_date] => 2020-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 33 [patent_no_of_words] => 9778 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17104891 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/104891
Semiconductor device structure and methods of forming the same Nov 24, 2020 Issued
Array ( [id] => 17878640 [patent_doc_number] => 11450664 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-20 [patent_title] => Semiconductor device having nanosheet transistor and methods of fabrication thereof [patent_app_type] => utility [patent_app_number] => 17/105108 [patent_app_country] => US [patent_app_date] => 2020-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 75 [patent_no_of_words] => 12926 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17105108 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/105108
Semiconductor device having nanosheet transistor and methods of fabrication thereof Nov 24, 2020 Issued
Array ( [id] => 17878642 [patent_doc_number] => 11450666 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-20 [patent_title] => Semiconductor devices including two-dimensional material and methods of fabrication thereof [patent_app_type] => utility [patent_app_number] => 17/103991 [patent_app_country] => US [patent_app_date] => 2020-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 50 [patent_figures_cnt] => 80 [patent_no_of_words] => 11257 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17103991 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/103991
Semiconductor devices including two-dimensional material and methods of fabrication thereof Nov 24, 2020 Issued
Array ( [id] => 17630841 [patent_doc_number] => 20220165856 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-26 [patent_title] => GAP SPACER FOR BACKSIDE CONTACT STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/103463 [patent_app_country] => US [patent_app_date] => 2020-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8001 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17103463 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/103463
Gap spacer for backside contact structure Nov 23, 2020 Issued
Array ( [id] => 17530109 [patent_doc_number] => 11302810 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-04-12 [patent_title] => Ferroelectric field effect transistor with nanowire core [patent_app_type] => utility [patent_app_number] => 16/953505 [patent_app_country] => US [patent_app_date] => 2020-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 4506 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16953505 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/953505
Ferroelectric field effect transistor with nanowire core Nov 19, 2020 Issued
Array ( [id] => 17070861 [patent_doc_number] => 20210273078 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-02 [patent_title] => Isolation Structures In Multi-Gate Semiconductor Devices And Methods Of Fabricating The Same [patent_app_type] => utility [patent_app_number] => 16/953598 [patent_app_country] => US [patent_app_date] => 2020-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8381 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16953598 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/953598
Isolation structures in multi-gate semiconductor devices and methods of fabricating the same Nov 19, 2020 Issued
Array ( [id] => 17417135 [patent_doc_number] => 20220052039 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-17 [patent_title] => Multi-Gate Device Structure [patent_app_type] => utility [patent_app_number] => 16/952684 [patent_app_country] => US [patent_app_date] => 2020-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9261 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16952684 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/952684
Multi-gate device structure Nov 18, 2020 Issued
Array ( [id] => 18249140 [patent_doc_number] => 11605740 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-14 [patent_title] => Transistor, integrated circuit, and manufacturing method of transistor [patent_app_type] => utility [patent_app_number] => 17/099800 [patent_app_country] => US [patent_app_date] => 2020-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 55 [patent_no_of_words] => 9611 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17099800 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/099800
Transistor, integrated circuit, and manufacturing method of transistor Nov 16, 2020 Issued
Array ( [id] => 16723797 [patent_doc_number] => 20210090944 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-25 [patent_title] => Semiconductor Structure with Staggered Selective Growth [patent_app_type] => utility [patent_app_number] => 17/099564 [patent_app_country] => US [patent_app_date] => 2020-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8828 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17099564 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/099564
Semiconductor structure with staggered selective growth Nov 15, 2020 Issued
Array ( [id] => 17825921 [patent_doc_number] => 11430877 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-30 [patent_title] => Ion implantation to reduce nanosheet gate length variation [patent_app_type] => utility [patent_app_number] => 17/098082 [patent_app_country] => US [patent_app_date] => 2020-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 3024 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17098082 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/098082
Ion implantation to reduce nanosheet gate length variation Nov 12, 2020 Issued
Array ( [id] => 18048014 [patent_doc_number] => 11521972 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-06 [patent_title] => High performance multi-dimensional device and logic integration [patent_app_type] => utility [patent_app_number] => 17/097146 [patent_app_country] => US [patent_app_date] => 2020-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 30 [patent_no_of_words] => 6454 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17097146 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/097146
High performance multi-dimensional device and logic integration Nov 12, 2020 Issued
Array ( [id] => 16660948 [patent_doc_number] => 20210057585 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-25 [patent_title] => THIN FILM TRANSISTOR, MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/092595 [patent_app_country] => US [patent_app_date] => 2020-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4239 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17092595 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/092595
THIN FILM TRANSISTOR, MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE Nov 8, 2020 Abandoned
Array ( [id] => 17389341 [patent_doc_number] => 20220037193 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-03 [patent_title] => Spacers for Semiconductor Devices Including a Backside Power Rails [patent_app_type] => utility [patent_app_number] => 17/092773 [patent_app_country] => US [patent_app_date] => 2020-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16614 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17092773 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/092773
Spacers for semiconductor devices including a backside power rails Nov 8, 2020 Issued
Array ( [id] => 17319197 [patent_doc_number] => 20210408247 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => SOURCE/DRAIN CONTACTS AND METHODS OF FORMING SAME [patent_app_type] => utility [patent_app_number] => 17/091159 [patent_app_country] => US [patent_app_date] => 2020-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16367 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17091159 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/091159
Source/drain contacts and methods of forming same Nov 5, 2020 Issued
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