
Tong-ho Kim
Examiner (ID: 282, Phone: (571)270-0276 , Office: P/2811 )
| Most Active Art Unit | 2811 |
| Art Unit(s) | 2811 |
| Total Applications | 1305 |
| Issued Applications | 1141 |
| Pending Applications | 141 |
| Abandoned Applications | 52 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 17623275
[patent_doc_number] => 11342339
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-05-24
[patent_title] => Method of making six transistor SRAM cell using connections between 3D transistor stacks
[patent_app_type] => utility
[patent_app_number] => 17/090501
[patent_app_country] => US
[patent_app_date] => 2020-11-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 26
[patent_no_of_words] => 7239
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17090501
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/090501 | Method of making six transistor SRAM cell using connections between 3D transistor stacks | Nov 4, 2020 | Issued |
Array
(
[id] => 17448627
[patent_doc_number] => 20220069132
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-03-03
[patent_title] => DISPLAY PANEL AND DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 15/734813
[patent_app_country] => US
[patent_app_date] => 2020-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5567
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 166
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15734813
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/734813 | Display panel and display device | Nov 3, 2020 | Issued |
Array
(
[id] => 17787984
[patent_doc_number] => 11411122
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-08-09
[patent_title] => Display device
[patent_app_type] => utility
[patent_app_number] => 17/086545
[patent_app_country] => US
[patent_app_date] => 2020-11-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 12
[patent_no_of_words] => 9387
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17086545
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/086545 | Display device | Nov 1, 2020 | Issued |
Array
(
[id] => 17848087
[patent_doc_number] => 11437474
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-09-06
[patent_title] => Gate structures in transistors and method of forming same
[patent_app_type] => utility
[patent_app_number] => 17/084357
[patent_app_country] => US
[patent_app_date] => 2020-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 62
[patent_figures_cnt] => 64
[patent_no_of_words] => 12436
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17084357
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/084357 | Gate structures in transistors and method of forming same | Oct 28, 2020 | Issued |
Array
(
[id] => 17971527
[patent_doc_number] => 11489078
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-11-01
[patent_title] => Lightly-doped channel extensions
[patent_app_type] => utility
[patent_app_number] => 17/081399
[patent_app_country] => US
[patent_app_date] => 2020-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 28
[patent_no_of_words] => 9741
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17081399
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/081399 | Lightly-doped channel extensions | Oct 26, 2020 | Issued |
Array
(
[id] => 17130612
[patent_doc_number] => 20210305381
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-30
[patent_title] => SEMICONDUCTOR DEVICES WITH BACKSIDE POWER RAIL AND BACKSIDE SELF-ALIGNED VIA
[patent_app_type] => utility
[patent_app_number] => 17/080521
[patent_app_country] => US
[patent_app_date] => 2020-10-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12545
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17080521
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/080521 | Semiconductor devices with backside power rail and backside self-aligned via | Oct 25, 2020 | Issued |
Array
(
[id] => 17402846
[patent_doc_number] => 20220044937
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-02-10
[patent_title] => TRANSISTOR GATE STRUCTURE AND METHOD OF FORMING
[patent_app_type] => utility
[patent_app_number] => 17/078911
[patent_app_country] => US
[patent_app_date] => 2020-10-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12252
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17078911
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/078911 | Transistor gate structure and method of forming | Oct 22, 2020 | Issued |
Array
(
[id] => 16781942
[patent_doc_number] => 20210119021
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-04-22
[patent_title] => METHODS FOR GAA I/O FORMATION BY SELECTIVE EPI REGROWTH
[patent_app_type] => utility
[patent_app_number] => 17/077153
[patent_app_country] => US
[patent_app_date] => 2020-10-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6203
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 24
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17077153
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/077153 | Methods for GAA I/O formation by selective epi regrowth | Oct 21, 2020 | Issued |
Array
(
[id] => 17566864
[patent_doc_number] => 20220131013
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-04-28
[patent_title] => MULTI-CHANNEL GATE-ALL-AROUND HIGH-ELECTRON-MOBILITY TRANSISTOR
[patent_app_type] => utility
[patent_app_number] => 17/077807
[patent_app_country] => US
[patent_app_date] => 2020-10-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5090
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17077807
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/077807 | MULTI-CHANNEL GATE-ALL-AROUND HIGH-ELECTRON-MOBILITY TRANSISTOR | Oct 21, 2020 | Abandoned |
Array
(
[id] => 16617267
[patent_doc_number] => 20210035920
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-02-04
[patent_title] => MAGNETIC SHIELDING MATERIAL WITH INSULATOR-COATED FERROMAGNETIC PARTICLES
[patent_app_type] => utility
[patent_app_number] => 17/076544
[patent_app_country] => US
[patent_app_date] => 2020-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5222
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17076544
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/076544 | Magnetic shielding material with insulator-coated ferromagnetic particles | Oct 20, 2020 | Issued |
Array
(
[id] => 17700271
[patent_doc_number] => 11374005
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-06-28
[patent_title] => Semiconductor structure and method of forming the same
[patent_app_type] => utility
[patent_app_number] => 17/075578
[patent_app_country] => US
[patent_app_date] => 2020-10-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 64
[patent_figures_cnt] => 65
[patent_no_of_words] => 13070
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17075578
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/075578 | Semiconductor structure and method of forming the same | Oct 19, 2020 | Issued |
Array
(
[id] => 16781668
[patent_doc_number] => 20210118747
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-04-22
[patent_title] => Split Replacement Metal Gate Integration
[patent_app_type] => utility
[patent_app_number] => 17/074047
[patent_app_country] => US
[patent_app_date] => 2020-10-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5466
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 195
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17074047
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/074047 | Split replacement metal gate integration | Oct 18, 2020 | Issued |
Array
(
[id] => 17247318
[patent_doc_number] => 20210367063
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-11-25
[patent_title] => Semiconductor Device and Method of Manufacture
[patent_app_type] => utility
[patent_app_number] => 17/072719
[patent_app_country] => US
[patent_app_date] => 2020-10-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16681
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17072719
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/072719 | Semiconductor device and method of manufacture | Oct 15, 2020 | Issued |
Array
(
[id] => 16765701
[patent_doc_number] => 20210111283
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-04-15
[patent_title] => MULTI-NEGATIVE DIFFERENTIAL TRANSCONDUCTANCE DEVICE AND METHOD OF PRODUCING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/071170
[patent_app_country] => US
[patent_app_date] => 2020-10-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5723
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17071170
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/071170 | Multi-negative differential transconductance device and method of producing the same | Oct 14, 2020 | Issued |
Array
(
[id] => 17787918
[patent_doc_number] => 11411055
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-08-09
[patent_title] => Display device
[patent_app_type] => utility
[patent_app_number] => 17/066797
[patent_app_country] => US
[patent_app_date] => 2020-10-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 37
[patent_figures_cnt] => 37
[patent_no_of_words] => 17952
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17066797
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/066797 | Display device | Oct 8, 2020 | Issued |
Array
(
[id] => 16601638
[patent_doc_number] => 20210028169
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-01-28
[patent_title] => SEMICONDUCTOR APPARATUS HAVING STACKED GATES AND METHOD OF MANUFACTURE THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/039307
[patent_app_country] => US
[patent_app_date] => 2020-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16697
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17039307
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/039307 | Semiconductor apparatus having stacked gates and method of manufacture thereof | Sep 29, 2020 | Issued |
Array
(
[id] => 17772422
[patent_doc_number] => 11404374
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-08-02
[patent_title] => Circuits employing a back side-front side connection structure for coupling back side routing to front side routing, and related complementary metal oxide semiconductor (CMOS) circuits and methods
[patent_app_type] => utility
[patent_app_number] => 17/038098
[patent_app_country] => US
[patent_app_date] => 2020-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 9856
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17038098
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/038098 | Circuits employing a back side-front side connection structure for coupling back side routing to front side routing, and related complementary metal oxide semiconductor (CMOS) circuits and methods | Sep 29, 2020 | Issued |
Array
(
[id] => 20675281
[patent_doc_number] => 12615814
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-04-28
[patent_title] => Transistor and method for fabricating the same
[patent_app_type] => utility
[patent_app_number] => 18/043313
[patent_app_country] => US
[patent_app_date] => 2020-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 17
[patent_no_of_words] => 4831
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 207
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18043313
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/043313 | Transistor and method for fabricating the same | Sep 29, 2020 | Issued |
Array
(
[id] => 16601642
[patent_doc_number] => 20210028173
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-01-28
[patent_title] => SEMICONDUCTOR DEVICES AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/037807
[patent_app_country] => US
[patent_app_date] => 2020-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9938
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 232
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17037807
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/037807 | Semiconductor devices and method of manufacturing the same | Sep 29, 2020 | Issued |
Array
(
[id] => 17730939
[patent_doc_number] => 11387341
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-07-12
[patent_title] => Semiconductor devices and methods of manufacturing thereof
[patent_app_type] => utility
[patent_app_number] => 17/037120
[patent_app_country] => US
[patent_app_date] => 2020-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 36
[patent_figures_cnt] => 36
[patent_no_of_words] => 9461
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 165
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17037120
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/037120 | Semiconductor devices and methods of manufacturing thereof | Sep 28, 2020 | Issued |