Search

Tong-ho Kim

Examiner (ID: 282, Phone: (571)270-0276 , Office: P/2811 )

Most Active Art Unit
2811
Art Unit(s)
2811
Total Applications
1305
Issued Applications
1141
Pending Applications
141
Abandoned Applications
52

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17224854 [patent_doc_number] => 11177364 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-16 [patent_title] => Integrated circuit device and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/938495 [patent_app_country] => US [patent_app_date] => 2020-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 45 [patent_no_of_words] => 13127 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16938495 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/938495
Integrated circuit device and method of manufacturing the same Jul 23, 2020 Issued
Array ( [id] => 17289035 [patent_doc_number] => 11205595 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-21 [patent_title] => Methods of fabricating semiconductor devices [patent_app_type] => utility [patent_app_number] => 16/936893 [patent_app_country] => US [patent_app_date] => 2020-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 7217 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16936893 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/936893
Methods of fabricating semiconductor devices Jul 22, 2020 Issued
Array ( [id] => 17270499 [patent_doc_number] => 11195930 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-12-07 [patent_title] => Semiconductor devices with backside power rail and methods of fabrication thereof [patent_app_type] => utility [patent_app_number] => 16/936233 [patent_app_country] => US [patent_app_date] => 2020-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 54 [patent_figures_cnt] => 100 [patent_no_of_words] => 9547 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16936233 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/936233
Semiconductor devices with backside power rail and methods of fabrication thereof Jul 21, 2020 Issued
Array ( [id] => 17396011 [patent_doc_number] => 11245036 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-02-08 [patent_title] => Latch-up prevention [patent_app_type] => utility [patent_app_number] => 16/935000 [patent_app_country] => US [patent_app_date] => 2020-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 11217 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16935000 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/935000
Latch-up prevention Jul 20, 2020 Issued
Array ( [id] => 17758212 [patent_doc_number] => 11398511 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-26 [patent_title] => Method for fabricating TFT array substrate [patent_app_type] => utility [patent_app_number] => 16/933801 [patent_app_country] => US [patent_app_date] => 2020-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 49 [patent_no_of_words] => 15721 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16933801 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/933801
Method for fabricating TFT array substrate Jul 19, 2020 Issued
Array ( [id] => 16425241 [patent_doc_number] => 20200350439 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-05 [patent_title] => SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE [patent_app_type] => utility [patent_app_number] => 16/931693 [patent_app_country] => US [patent_app_date] => 2020-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7735 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16931693 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/931693
Semiconductor integrated circuit device Jul 16, 2020 Issued
Array ( [id] => 16425240 [patent_doc_number] => 20200350438 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-05 [patent_title] => TFT SUBSTRATE [patent_app_type] => utility [patent_app_number] => 16/930744 [patent_app_country] => US [patent_app_date] => 2020-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16516 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16930744 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/930744
TFT substrate Jul 15, 2020 Issued
Array ( [id] => 16586363 [patent_doc_number] => 20210020765 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-21 [patent_title] => 2D-3D Heterojunction Tunnel Field-Effect Transistor [patent_app_type] => utility [patent_app_number] => 16/930422 [patent_app_country] => US [patent_app_date] => 2020-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8672 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16930422 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/930422
2D-3D heterojunction tunnel field-effect transistor Jul 15, 2020 Issued
Array ( [id] => 17381321 [patent_doc_number] => 11239354 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-01 [patent_title] => Semiconductor device and method of fabricating the same [patent_app_type] => utility [patent_app_number] => 16/926766 [patent_app_country] => US [patent_app_date] => 2020-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 5882 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16926766 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/926766
Semiconductor device and method of fabricating the same Jul 11, 2020 Issued
Array ( [id] => 17347190 [patent_doc_number] => 20220013521 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-13 [patent_title] => STACKED GATE STRUCTURES [patent_app_type] => utility [patent_app_number] => 16/946856 [patent_app_country] => US [patent_app_date] => 2020-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11493 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16946856 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/946856
Stacked gate structures Jul 8, 2020 Issued
Array ( [id] => 16965400 [patent_doc_number] => 20210216899 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-15 [patent_title] => THREE-DIMENSIONAL TRANSMON QUBIT APPARATUS [patent_app_type] => utility [patent_app_number] => 16/916832 [patent_app_country] => US [patent_app_date] => 2020-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9096 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16916832 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/916832
Three-dimensional transmon qubit apparatus Jun 29, 2020 Issued
Array ( [id] => 17310374 [patent_doc_number] => 11211501 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-28 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 16/916228 [patent_app_country] => US [patent_app_date] => 2020-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 90 [patent_no_of_words] => 35414 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16916228 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/916228
Semiconductor device Jun 29, 2020 Issued
Array ( [id] => 16601761 [patent_doc_number] => 20210028292 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-28 [patent_title] => FERROELECTRIC FIELD EFFECT TRANSISTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/917172 [patent_app_country] => US [patent_app_date] => 2020-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6153 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16917172 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/917172
Ferroelectric field effect transistor device Jun 29, 2020 Issued
Array ( [id] => 17607191 [patent_doc_number] => 11335683 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-17 [patent_title] => Device channel profile structure [patent_app_type] => utility [patent_app_number] => 16/917451 [patent_app_country] => US [patent_app_date] => 2020-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 24 [patent_no_of_words] => 5545 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16917451 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/917451
Device channel profile structure Jun 29, 2020 Issued
Array ( [id] => 17310375 [patent_doc_number] => 11211502 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-28 [patent_title] => Transistor and manufacturing method thereof, transistor device, display substrate and apparatus [patent_app_type] => utility [patent_app_number] => 16/915219 [patent_app_country] => US [patent_app_date] => 2020-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 5797 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16915219 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/915219
Transistor and manufacturing method thereof, transistor device, display substrate and apparatus Jun 28, 2020 Issued
Array ( [id] => 17638185 [patent_doc_number] => 11348919 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-31 [patent_title] => Gate-all-around integrated circuit structures having depopulated channel structures using selective bottom-up approach [patent_app_type] => utility [patent_app_number] => 16/912113 [patent_app_country] => US [patent_app_date] => 2020-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 33 [patent_no_of_words] => 16553 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16912113 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/912113
Gate-all-around integrated circuit structures having depopulated channel structures using selective bottom-up approach Jun 24, 2020 Issued
Array ( [id] => 17326553 [patent_doc_number] => 11217578 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-04 [patent_title] => Resistor with doped regions [patent_app_type] => utility [patent_app_number] => 16/911795 [patent_app_country] => US [patent_app_date] => 2020-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 25 [patent_no_of_words] => 4621 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16911795 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/911795
Resistor with doped regions Jun 24, 2020 Issued
Array ( [id] => 17319206 [patent_doc_number] => 20210408256 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => ANTENNA-FREE HIGH-K GATE DIELECTRIC FOR A GATE-ALL-AROUND TRANSISTOR AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 16/910120 [patent_app_country] => US [patent_app_date] => 2020-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15994 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16910120 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/910120
Antenna-free high-k gate dielectric for a gate-all-around transistor and methods of forming the same Jun 23, 2020 Issued
Array ( [id] => 16594141 [patent_doc_number] => 10903419 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-26 [patent_title] => Resistive memory device and method of manufacturing the resistive memory device [patent_app_type] => utility [patent_app_number] => 16/909663 [patent_app_country] => US [patent_app_date] => 2020-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 5796 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16909663 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/909663
Resistive memory device and method of manufacturing the resistive memory device Jun 22, 2020 Issued
Array ( [id] => 17056055 [patent_doc_number] => 20210265489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-26 [patent_title] => Semiconductor Device and Method [patent_app_type] => utility [patent_app_number] => 16/906546 [patent_app_country] => US [patent_app_date] => 2020-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13895 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16906546 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/906546
Semiconductor device and method Jun 18, 2020 Issued
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