
Tong-ho Kim
Examiner (ID: 282, Phone: (571)270-0276 , Office: P/2811 )
| Most Active Art Unit | 2811 |
| Art Unit(s) | 2811 |
| Total Applications | 1305 |
| Issued Applications | 1141 |
| Pending Applications | 141 |
| Abandoned Applications | 52 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 17353284
[patent_doc_number] => 11227931
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-01-18
[patent_title] => Nanosheet field-effect transistor device and method of forming
[patent_app_type] => utility
[patent_app_number] => 16/904751
[patent_app_country] => US
[patent_app_date] => 2020-06-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 34
[patent_no_of_words] => 9731
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16904751
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/904751 | Nanosheet field-effect transistor device and method of forming | Jun 17, 2020 | Issued |
Array
(
[id] => 17303259
[patent_doc_number] => 20210399098
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-12-23
[patent_title] => Sloped Epitaxy Buried Contact
[patent_app_type] => utility
[patent_app_number] => 16/905626
[patent_app_country] => US
[patent_app_date] => 2020-06-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10761
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16905626
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/905626 | Sloped epitaxy buried contact | Jun 17, 2020 | Issued |
Array
(
[id] => 18999225
[patent_doc_number] => 11916081
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-02-27
[patent_title] => Display panel
[patent_app_type] => utility
[patent_app_number] => 16/970363
[patent_app_country] => US
[patent_app_date] => 2020-06-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2373
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16970363
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/970363 | Display panel | Jun 17, 2020 | Issued |
Array
(
[id] => 17232533
[patent_doc_number] => 20210359090
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-11-18
[patent_title] => TRANSISTOR STRUCTURE, GOA CIRCUIT, AND DISPLAY PANEL
[patent_app_type] => utility
[patent_app_number] => 16/981308
[patent_app_country] => US
[patent_app_date] => 2020-06-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4180
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16981308
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/981308 | TRANSISTOR STRUCTURE, GOA CIRCUIT, AND DISPLAY PANEL | Jun 15, 2020 | Abandoned |
Array
(
[id] => 17517040
[patent_doc_number] => 11296201
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-04-05
[patent_title] => Gate structure and method of fabricating the same
[patent_app_type] => utility
[patent_app_number] => 16/901314
[patent_app_country] => US
[patent_app_date] => 2020-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 22
[patent_no_of_words] => 6591
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16901314
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/901314 | Gate structure and method of fabricating the same | Jun 14, 2020 | Issued |
Array
(
[id] => 17295639
[patent_doc_number] => 20210391478
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-12-16
[patent_title] => CHARGE-TRANSFER SPACERS FOR STACKED NANORIBBON 2D TRANSISTORS
[patent_app_type] => utility
[patent_app_number] => 16/902069
[patent_app_country] => US
[patent_app_date] => 2020-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5758
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16902069
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/902069 | Charge-transfer spacers for stacked nanoribbon 2D transistors | Jun 14, 2020 | Issued |
Array
(
[id] => 17181466
[patent_doc_number] => 11158716
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-10-26
[patent_title] => Semiconductor device and method for manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 16/901207
[patent_app_country] => US
[patent_app_date] => 2020-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 51
[patent_figures_cnt] => 51
[patent_no_of_words] => 11960
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 180
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16901207
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/901207 | Semiconductor device and method for manufacturing the same | Jun 14, 2020 | Issued |
Array
(
[id] => 17516827
[patent_doc_number] => 11295988
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-04-05
[patent_title] => Semiconductor FET device with bottom isolation and high-k first
[patent_app_type] => utility
[patent_app_number] => 16/899430
[patent_app_country] => US
[patent_app_date] => 2020-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 30
[patent_no_of_words] => 7555
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16899430
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/899430 | Semiconductor FET device with bottom isolation and high-k first | Jun 10, 2020 | Issued |
Array
(
[id] => 17862961
[patent_doc_number] => 11444123
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-09-13
[patent_title] => Selector transistor with metal replacement gate wordline
[patent_app_type] => utility
[patent_app_number] => 16/898234
[patent_app_country] => US
[patent_app_date] => 2020-06-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 5957
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16898234
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/898234 | Selector transistor with metal replacement gate wordline | Jun 9, 2020 | Issued |
Array
(
[id] => 16601640
[patent_doc_number] => 20210028171
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-01-28
[patent_title] => METHODS AND APPARATUSES INCLUDING A BOUNDARY OF A WELL BENEATH AN ACTIVE AREA OF A TAP
[patent_app_type] => utility
[patent_app_number] => 16/895927
[patent_app_country] => US
[patent_app_date] => 2020-06-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4043
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16895927
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/895927 | Methods and apparatuses including a boundary of a well beneath an active area of a tap | Jun 7, 2020 | Issued |
Array
(
[id] => 16332498
[patent_doc_number] => 20200303464
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-09-24
[patent_title] => THREE-DIMENSIONAL MEMORY ARRAY
[patent_app_type] => utility
[patent_app_number] => 16/892695
[patent_app_country] => US
[patent_app_date] => 2020-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9915
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16892695
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/892695 | Three-dimensional memory array | Jun 3, 2020 | Issued |
Array
(
[id] => 16936869
[patent_doc_number] => 20210202758
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-07-01
[patent_title] => NANOSHEET FIELD-EFFECT TRANSISTOR DEVICE AND METHOD OF FORMING
[patent_app_type] => utility
[patent_app_number] => 16/882965
[patent_app_country] => US
[patent_app_date] => 2020-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8270
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16882965
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/882965 | Nanosheet field-effect transistor device and method of forming | May 25, 2020 | Issued |
Array
(
[id] => 17152625
[patent_doc_number] => 11145716
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-10-12
[patent_title] => Semiconductor devices with low resistance gate structures
[patent_app_type] => utility
[patent_app_number] => 16/877510
[patent_app_country] => US
[patent_app_date] => 2020-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 3567
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16877510
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/877510 | Semiconductor devices with low resistance gate structures | May 18, 2020 | Issued |
Array
(
[id] => 17247240
[patent_doc_number] => 20210366985
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-11-25
[patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 16/877497
[patent_app_country] => US
[patent_app_date] => 2020-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8093
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16877497
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/877497 | Semiconductor device and manufacturing method thereof | May 18, 2020 | Issued |
Array
(
[id] => 17470196
[patent_doc_number] => 11276679
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-03-15
[patent_title] => Semiconductor device and method of forming the same
[patent_app_type] => utility
[patent_app_number] => 16/878517
[patent_app_country] => US
[patent_app_date] => 2020-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 11
[patent_no_of_words] => 5282
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16878517
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/878517 | Semiconductor device and method of forming the same | May 18, 2020 | Issued |
Array
(
[id] => 17424353
[patent_doc_number] => 11257815
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-02-22
[patent_title] => Work function design to increase density of nanosheet devices
[patent_app_type] => utility
[patent_app_number] => 16/874907
[patent_app_country] => US
[patent_app_date] => 2020-05-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 27
[patent_no_of_words] => 13768
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 200
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16874907
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/874907 | Work function design to increase density of nanosheet devices | May 14, 2020 | Issued |
Array
(
[id] => 16256733
[patent_doc_number] => 20200266108
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-08-20
[patent_title] => SEMICONDUCTOR DEVICE WITH FIN STRUCTURES
[patent_app_type] => utility
[patent_app_number] => 16/867754
[patent_app_country] => US
[patent_app_date] => 2020-05-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7319
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16867754
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/867754 | Semiconductor device with fin structures | May 5, 2020 | Issued |
Array
(
[id] => 16516139
[patent_doc_number] => 20200395397
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-12-17
[patent_title] => IMAGE SENSOR AND IMAGE-CAPTURING DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/865717
[patent_app_country] => US
[patent_app_date] => 2020-05-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13009
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16865717
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/865717 | IMAGE SENSOR AND IMAGE-CAPTURING DEVICE | May 3, 2020 | Abandoned |
Array
(
[id] => 17730944
[patent_doc_number] => 11387346
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-07-12
[patent_title] => Gate patterning process for multi-gate devices
[patent_app_type] => utility
[patent_app_number] => 16/858440
[patent_app_country] => US
[patent_app_date] => 2020-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 38
[patent_figures_cnt] => 75
[patent_no_of_words] => 11126
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16858440
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/858440 | Gate patterning process for multi-gate devices | Apr 23, 2020 | Issued |
Array
(
[id] => 17092940
[patent_doc_number] => 11121138
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-09-14
[patent_title] => Low resistance pickup cells for SRAM
[patent_app_type] => utility
[patent_app_number] => 16/858460
[patent_app_country] => US
[patent_app_date] => 2020-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 16
[patent_no_of_words] => 7910
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16858460
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/858460 | Low resistance pickup cells for SRAM | Apr 23, 2020 | Issued |