Search

Tong-ho Kim

Examiner (ID: 282, Phone: (571)270-0276 , Office: P/2811 )

Most Active Art Unit
2811
Art Unit(s)
2811
Total Applications
1305
Issued Applications
1141
Pending Applications
141
Abandoned Applications
52

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16973676 [patent_doc_number] => 11069657 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-20 [patent_title] => Chip package having die structures of different heights and method of forming same [patent_app_type] => utility [patent_app_number] => 16/740975 [patent_app_country] => US [patent_app_date] => 2020-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 8841 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16740975 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/740975
Chip package having die structures of different heights and method of forming same Jan 12, 2020 Issued
Array ( [id] => 15906687 [patent_doc_number] => 20200152864 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-14 [patent_title] => MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/741557 [patent_app_country] => US [patent_app_date] => 2020-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8387 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16741557 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/741557
Memory device Jan 12, 2020 Issued
Array ( [id] => 16471668 [patent_doc_number] => 20200373206 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-26 [patent_title] => GATE STRUCTURES FOR SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 16/739676 [patent_app_country] => US [patent_app_date] => 2020-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14911 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16739676 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/739676
Gate structures for semiconductor devices Jan 9, 2020 Issued
Array ( [id] => 15939603 [patent_doc_number] => 20200161435 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-21 [patent_title] => Metal Oxide Film and Semiconductor Device [patent_app_type] => utility [patent_app_number] => 16/739647 [patent_app_country] => US [patent_app_date] => 2020-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 59458 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16739647 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/739647
Metal oxide film and semiconductor device Jan 9, 2020 Issued
Array ( [id] => 17590866 [patent_doc_number] => 11329143 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-10 [patent_title] => Nanosheet transistors with thin inner spacers and tight pitch gate [patent_app_type] => utility [patent_app_number] => 16/732757 [patent_app_country] => US [patent_app_date] => 2020-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 4440 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16732757 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/732757
Nanosheet transistors with thin inner spacers and tight pitch gate Jan 1, 2020 Issued
Array ( [id] => 16936430 [patent_doc_number] => 20210202319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-01 [patent_title] => THREE-DIMENSIONAL INTEGRATED CIRCUITS (3DICS) INCLUDING UPPER-LEVEL TRANSISTORS WITH EPITAXIAL SOURCE & DRAIN MATERIAL [patent_app_type] => utility [patent_app_number] => 16/728903 [patent_app_country] => US [patent_app_date] => 2019-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11827 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16728903 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/728903
Three-dimensional integrated circuits (3DICs) including upper-level transistors with epitaxial source and drain material Dec 26, 2019 Issued
Array ( [id] => 16936576 [patent_doc_number] => 20210202465 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-01 [patent_title] => Integrated Hybrid Standard Cell Structure with Gate-All-Around Device [patent_app_type] => utility [patent_app_number] => 16/727731 [patent_app_country] => US [patent_app_date] => 2019-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10115 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16727731 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/727731
Integrated hybrid standard cell structure with gate-all-around device Dec 25, 2019 Issued
Array ( [id] => 17439173 [patent_doc_number] => 11264514 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-01 [patent_title] => Thin film transistor, pixel structure, display substrate, display panel, and display device [patent_app_type] => utility [patent_app_number] => 16/966873 [patent_app_country] => US [patent_app_date] => 2019-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 5078 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 279 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16966873 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/966873
Thin film transistor, pixel structure, display substrate, display panel, and display device Dec 23, 2019 Issued
Array ( [id] => 17303271 [patent_doc_number] => 20210399110 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-23 [patent_title] => DISPLAY PANEL AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/627811 [patent_app_country] => US [patent_app_date] => 2019-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3651 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16627811 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/627811
Display panel and manufacturing method thereof Dec 23, 2019 Issued
Array ( [id] => 16911441 [patent_doc_number] => 11043491 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-22 [patent_title] => Semiconductor device and a method for fabricating the same [patent_app_type] => utility [patent_app_number] => 16/722763 [patent_app_country] => US [patent_app_date] => 2019-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 25 [patent_no_of_words] => 5195 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16722763 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/722763
Semiconductor device and a method for fabricating the same Dec 19, 2019 Issued
Array ( [id] => 15873417 [patent_doc_number] => 20200144112 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-07 [patent_title] => Physical Vapor Deposition Process for Semiconductor Interconnection Structures [patent_app_type] => utility [patent_app_number] => 16/722433 [patent_app_country] => US [patent_app_date] => 2019-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8940 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16722433 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/722433
Physical vapor deposition process for semiconductor interconnection structures Dec 19, 2019 Issued
Array ( [id] => 16487834 [patent_doc_number] => 20200381443 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-03 [patent_title] => FLOATING GATE TEST STRUCTURE FOR EMBEDDED MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/720163 [patent_app_country] => US [patent_app_date] => 2019-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10123 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16720163 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/720163
Floating gate test structure for embedded memory device Dec 18, 2019 Issued
Array ( [id] => 16873714 [patent_doc_number] => 20210167181 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-03 [patent_title] => THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF, ARRAY SUBSTRATE AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/767247 [patent_app_country] => US [patent_app_date] => 2019-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9270 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16767247 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/767247
Thin film transistor and manufacturing method thereof, array substrate and display device Dec 17, 2019 Issued
Array ( [id] => 18721652 [patent_doc_number] => 11799009 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-24 [patent_title] => Gate-all-around integrated circuit structures having adjacent structures for sub-fin electrical contact [patent_app_type] => utility [patent_app_number] => 16/716907 [patent_app_country] => US [patent_app_date] => 2019-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 27 [patent_no_of_words] => 14920 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16716907 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/716907
Gate-all-around integrated circuit structures having adjacent structures for sub-fin electrical contact Dec 16, 2019 Issued
Array ( [id] => 16944225 [patent_doc_number] => 11056476 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-06 [patent_title] => Microcontroller unit and fabrication method thereof [patent_app_type] => utility [patent_app_number] => 16/715229 [patent_app_country] => US [patent_app_date] => 2019-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 18 [patent_no_of_words] => 14979 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16715229 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/715229
Microcontroller unit and fabrication method thereof Dec 15, 2019 Issued
Array ( [id] => 16099097 [patent_doc_number] => 20200203535 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-25 [patent_title] => THIN FILM TRANSISTOR AND DISPLAY PANEL USING THE SAME [patent_app_type] => utility [patent_app_number] => 16/711049 [patent_app_country] => US [patent_app_date] => 2019-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11083 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16711049 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/711049
Thin film transistor and display panel using the same Dec 10, 2019 Issued
Array ( [id] => 17886870 [patent_doc_number] => 20220302348 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-22 [patent_title] => Micro LED chip, display panel and method for welding micro LED chip [patent_app_type] => utility [patent_app_number] => 17/058660 [patent_app_country] => US [patent_app_date] => 2019-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3271 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17058660 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/058660
Micro LED chip, display panel and method for welding micro LED chip Dec 9, 2019 Abandoned
Array ( [id] => 15745945 [patent_doc_number] => 20200111862 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-09 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/708104 [patent_app_country] => US [patent_app_date] => 2019-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16181 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16708104 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/708104
Display device Dec 8, 2019 Issued
Array ( [id] => 16479824 [patent_doc_number] => 10854781 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-01 [patent_title] => Parabolic vertical hybrid light emitting diode [patent_app_type] => utility [patent_app_number] => 16/705194 [patent_app_country] => US [patent_app_date] => 2019-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4093 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16705194 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/705194
Parabolic vertical hybrid light emitting diode Dec 4, 2019 Issued
Array ( [id] => 18382019 [patent_doc_number] => 20230157110 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => DISPLAY PANEL AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/976796 [patent_app_country] => US [patent_app_date] => 2019-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16023 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -48 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16976796 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/976796
Display panel and display device Nov 28, 2019 Issued
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