Search

Tong-ho Kim

Examiner (ID: 9651, Phone: (571)270-0276 , Office: P/2811 )

Most Active Art Unit
2811
Art Unit(s)
2811
Total Applications
1259
Issued Applications
1112
Pending Applications
128
Abandoned Applications
51

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19627189 [patent_doc_number] => 12166038 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-10 [patent_title] => Semiconductor device and a method for fabricating the same [patent_app_type] => utility [patent_app_number] => 18/224487 [patent_app_country] => US [patent_app_date] => 2023-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 25 [patent_no_of_words] => 5233 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18224487 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/224487
Semiconductor device and a method for fabricating the same Jul 19, 2023 Issued
Array ( [id] => 19582617 [patent_doc_number] => 12148745 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-19 [patent_title] => Integrated hybrid standard cell structure with gate-all-around device [patent_app_type] => utility [patent_app_number] => 18/355960 [patent_app_country] => US [patent_app_date] => 2023-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 23 [patent_no_of_words] => 10163 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 250 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18355960 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/355960
Integrated hybrid standard cell structure with gate-all-around device Jul 19, 2023 Issued
Array ( [id] => 19452946 [patent_doc_number] => 20240313076 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => GATE DIELECTRIC LAYERS FOR STACKED MULTI-GATE DEVICE [patent_app_type] => utility [patent_app_number] => 18/355688 [patent_app_country] => US [patent_app_date] => 2023-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10534 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18355688 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/355688
GATE DIELECTRIC LAYERS FOR STACKED MULTI-GATE DEVICE Jul 19, 2023 Pending
Array ( [id] => 19727142 [patent_doc_number] => 20250029893 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-23 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/224489 [patent_app_country] => US [patent_app_date] => 2023-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5350 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18224489 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/224489
SEMICONDUCTOR DEVICE Jul 19, 2023 Pending
Array ( [id] => 19524180 [patent_doc_number] => 12125921 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-22 [patent_title] => Semiconducting metal oxide transistors having a patterned gate and methods for forming the same [patent_app_type] => utility [patent_app_number] => 18/354681 [patent_app_country] => US [patent_app_date] => 2023-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 33 [patent_no_of_words] => 13808 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18354681 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/354681
Semiconducting metal oxide transistors having a patterned gate and methods for forming the same Jul 18, 2023 Issued
Array ( [id] => 19452863 [patent_doc_number] => 20240312993 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => SINGLE METAL GATE WITH DUAL EFFECTIVE WORK FUNCTION GATE METAL SCHEME [patent_app_type] => utility [patent_app_number] => 18/354515 [patent_app_country] => US [patent_app_date] => 2023-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8736 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18354515 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/354515
SINGLE METAL GATE WITH DUAL EFFECTIVE WORK FUNCTION GATE METAL SCHEME Jul 17, 2023 Pending
Array ( [id] => 18759656 [patent_doc_number] => 20230363145 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-09 [patent_title] => CAPACITOR, MEMORY DEVICE, AND METHOD [patent_app_type] => utility [patent_app_number] => 18/352738 [patent_app_country] => US [patent_app_date] => 2023-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21202 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18352738 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/352738
Capacitor, memory device, and method Jul 13, 2023 Issued
Array ( [id] => 19568310 [patent_doc_number] => 12143093 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-12 [patent_title] => Substrate for a temperature-compensated surface acoustic wave device or volume acoustic wave device [patent_app_type] => utility [patent_app_number] => 18/352972 [patent_app_country] => US [patent_app_date] => 2023-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 3854 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18352972 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/352972
Substrate for a temperature-compensated surface acoustic wave device or volume acoustic wave device Jul 13, 2023 Issued
Array ( [id] => 19494392 [patent_doc_number] => 12113116 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-08 [patent_title] => Semiconductor device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 18/352876 [patent_app_country] => US [patent_app_date] => 2023-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 64 [patent_figures_cnt] => 64 [patent_no_of_words] => 11623 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18352876 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/352876
Semiconductor device and manufacturing method thereof Jul 13, 2023 Issued
Array ( [id] => 19285973 [patent_doc_number] => 20240222450 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/221479 [patent_app_country] => US [patent_app_date] => 2023-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14104 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18221479 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/221479
SEMICONDUCTOR DEVICE Jul 12, 2023 Pending
Array ( [id] => 18743564 [patent_doc_number] => 20230352552 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-02 [patent_title] => Memory, Gate-All-Around Field-Effect Transistor, and Manufacturing Method [patent_app_type] => utility [patent_app_number] => 18/350348 [patent_app_country] => US [patent_app_date] => 2023-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9659 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18350348 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/350348
Memory, Gate-All-Around Field-Effect Transistor, and Manufacturing Method Jul 10, 2023 Pending
Array ( [id] => 19101050 [patent_doc_number] => 20240120278 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-11 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/219140 [patent_app_country] => US [patent_app_date] => 2023-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13201 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18219140 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/219140
Semiconductor device Jul 6, 2023 Issued
Array ( [id] => 18743431 [patent_doc_number] => 20230352419 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-02 [patent_title] => SEMICONDUCTOR PACKAGES [patent_app_type] => utility [patent_app_number] => 18/346887 [patent_app_country] => US [patent_app_date] => 2023-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10831 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18346887 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/346887
Semiconductor packages Jul 4, 2023 Issued
Array ( [id] => 18743565 [patent_doc_number] => 20230352553 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-02 [patent_title] => GATE STRUCTURE AND METHOD [patent_app_type] => utility [patent_app_number] => 18/347480 [patent_app_country] => US [patent_app_date] => 2023-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18449 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18347480 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/347480
Gate structure and method Jul 4, 2023 Issued
Array ( [id] => 18729490 [patent_doc_number] => 20230343786 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-26 [patent_title] => SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 18/347023 [patent_app_country] => US [patent_app_date] => 2023-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9025 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18347023 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/347023
Semiconductor devices Jul 4, 2023 Issued
Array ( [id] => 19507978 [patent_doc_number] => 12119409 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-15 [patent_title] => Multi-layer crystalline back gated thin film transistor [patent_app_type] => utility [patent_app_number] => 18/345641 [patent_app_country] => US [patent_app_date] => 2023-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 8576 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18345641 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/345641
Multi-layer crystalline back gated thin film transistor Jun 29, 2023 Issued
Array ( [id] => 19446316 [patent_doc_number] => 12096629 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-17 [patent_title] => Floating gate test structure for embedded memory device [patent_app_type] => utility [patent_app_number] => 18/344161 [patent_app_country] => US [patent_app_date] => 2023-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 25 [patent_no_of_words] => 10066 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18344161 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/344161
Floating gate test structure for embedded memory device Jun 28, 2023 Issued
Array ( [id] => 18729551 [patent_doc_number] => 20230343847 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-26 [patent_title] => GATE STRUCTURE AND METHOD [patent_app_type] => utility [patent_app_number] => 18/340758 [patent_app_country] => US [patent_app_date] => 2023-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11450 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18340758 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/340758
Gate structure and method Jun 22, 2023 Issued
Array ( [id] => 19662212 [patent_doc_number] => 20240429277 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-26 [patent_title] => MULTIPLE GATE DIELECTRICS FOR MONOLITHIC STACKED DEVICES [patent_app_type] => utility [patent_app_number] => 18/213493 [patent_app_country] => US [patent_app_date] => 2023-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12022 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 264 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18213493 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/213493
MULTIPLE GATE DIELECTRICS FOR MONOLITHIC STACKED DEVICES Jun 22, 2023 Pending
Array ( [id] => 19662235 [patent_doc_number] => 20240429300 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-26 [patent_title] => GATE-ALL-AROUND (GAA) FIELD-EFFECT TRANSISTOR (FET) DEVICE HAVING FETs WITH DIFFERENT CRYSTALLINE ORIENTATION CHANNELS THROUGH A SUBSTRATE [patent_app_type] => utility [patent_app_number] => 18/339349 [patent_app_country] => US [patent_app_date] => 2023-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11739 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18339349 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/339349
GATE-ALL-AROUND (GAA) FIELD-EFFECT TRANSISTOR (FET) DEVICE HAVING FETs WITH DIFFERENT CRYSTALLINE ORIENTATION CHANNELS THROUGH A SUBSTRATE Jun 21, 2023 Pending
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