Search

Toniae M. Thomas

Examiner (ID: 10576)

Most Active Art Unit
2822
Art Unit(s)
1763, 2822, 2813, 1104
Total Applications
1101
Issued Applications
969
Pending Applications
9
Abandoned Applications
127

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6575496 [patent_doc_number] => 20100096717 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-22 [patent_title] => 'ELECTRONIC DEVICE AND PROCESS FOR MANUFACTURING ELECTRONIC DEVICE' [patent_app_type] => utility [patent_app_number] => 12/580388 [patent_app_country] => US [patent_app_date] => 2009-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9549 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0096/20100096717.pdf [firstpage_image] =>[orig_patent_app_number] => 12580388 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/580388
ELECTRONIC DEVICE AND PROCESS FOR MANUFACTURING ELECTRONIC DEVICE Oct 15, 2009 Abandoned
Array ( [id] => 8146582 [patent_doc_number] => 08163589 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-24 [patent_title] => 'Active layer for solar cell and the manufacturing method making the same' [patent_app_type] => utility [patent_app_number] => 12/588467 [patent_app_country] => US [patent_app_date] => 2009-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3181 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/163/08163589.pdf [firstpage_image] =>[orig_patent_app_number] => 12588467 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/588467
Active layer for solar cell and the manufacturing method making the same Oct 15, 2009 Issued
Array ( [id] => 6126851 [patent_doc_number] => 20110086495 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-14 [patent_title] => 'METHODS FOR PROTECTING FILM LAYERS WHILE REMOVING HARDMASKS DURING FABRICATION OF SEMICONDUCTOR DEVICES' [patent_app_type] => utility [patent_app_number] => 12/577628 [patent_app_country] => US [patent_app_date] => 2009-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3430 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0086/20110086495.pdf [firstpage_image] =>[orig_patent_app_number] => 12577628 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/577628
Methods for protecting film layers while removing hardmasks during fabrication of semiconductor devices Oct 11, 2009 Issued
Array ( [id] => 6502081 [patent_doc_number] => 20100012990 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-21 [patent_title] => 'MOSFETS INCLUDING CRYSTALLINE SACRIFICIAL STRUCTURES' [patent_app_type] => utility [patent_app_number] => 12/566389 [patent_app_country] => US [patent_app_date] => 2009-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5078 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20100012990.pdf [firstpage_image] =>[orig_patent_app_number] => 12566389 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/566389
MOSFETS INCLUDING CRYSTALLINE SACRIFICIAL STRUCTURES Sep 23, 2009 Abandoned
Array ( [id] => 5461598 [patent_doc_number] => 20090321798 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-31 [patent_title] => 'CMOS Image Sensor and Method of Manufacturing the Same' [patent_app_type] => utility [patent_app_number] => 12/553408 [patent_app_country] => US [patent_app_date] => 2009-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1864 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0321/20090321798.pdf [firstpage_image] =>[orig_patent_app_number] => 12553408 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/553408
CMOS Image Sensor and Method of Manufacturing the Same Sep 2, 2009 Abandoned
Array ( [id] => 7540861 [patent_doc_number] => 08058705 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-15 [patent_title] => 'Composite material substrate' [patent_app_type] => utility [patent_app_number] => 12/551534 [patent_app_country] => US [patent_app_date] => 2009-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 2051 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/058/08058705.pdf [firstpage_image] =>[orig_patent_app_number] => 12551534 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/551534
Composite material substrate Aug 30, 2009 Issued
Array ( [id] => 5993119 [patent_doc_number] => 20110014772 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-20 [patent_title] => 'ALIGNING METHOD OF PATTERNED ELECTRODE IN A SELECTIVE EMITTER STRUCTURE' [patent_app_type] => utility [patent_app_number] => 12/549358 [patent_app_country] => US [patent_app_date] => 2009-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 1581 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0014/20110014772.pdf [firstpage_image] =>[orig_patent_app_number] => 12549358 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/549358
ALIGNING METHOD OF PATTERNED ELECTRODE IN A SELECTIVE EMITTER STRUCTURE Aug 27, 2009 Abandoned
Array ( [id] => 4528695 [patent_doc_number] => 07923326 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-12 [patent_title] => 'Memory device and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/548988 [patent_app_country] => US [patent_app_date] => 2009-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 4736 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/923/07923326.pdf [firstpage_image] =>[orig_patent_app_number] => 12548988 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/548988
Memory device and method for manufacturing the same Aug 26, 2009 Issued
Array ( [id] => 4614287 [patent_doc_number] => 07989900 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-02 [patent_title] => 'Semiconductor structure including gate electrode having laterally variable work function' [patent_app_type] => utility [patent_app_number] => 12/544452 [patent_app_country] => US [patent_app_date] => 2009-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 30 [patent_no_of_words] => 6918 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/989/07989900.pdf [firstpage_image] =>[orig_patent_app_number] => 12544452 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/544452
Semiconductor structure including gate electrode having laterally variable work function Aug 19, 2009 Issued
Array ( [id] => 5374290 [patent_doc_number] => 20090311851 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-17 [patent_title] => 'NONVOLATILE MEMORY DEVICE USING SEMICONDUCTOR NANOCRYSTALS AND METHOD FORMING SAME' [patent_app_type] => utility [patent_app_number] => 12/545010 [patent_app_country] => US [patent_app_date] => 2009-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7256 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0311/20090311851.pdf [firstpage_image] =>[orig_patent_app_number] => 12545010 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/545010
Nonvolatile memory device using semiconductor nanocrystals and method forming same Aug 19, 2009 Issued
Array ( [id] => 6089522 [patent_doc_number] => 20110217849 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-08 [patent_title] => 'DEVICE AND METHOD FOR PRODUCING DIELECTRIC LAYERS IN MICROWAVE PLASMA' [patent_app_type] => utility [patent_app_number] => 13/057841 [patent_app_country] => US [patent_app_date] => 2009-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6462 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0217/20110217849.pdf [firstpage_image] =>[orig_patent_app_number] => 13057841 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/057841
Device and method for producing dielectric layers in microwave plasma Aug 3, 2009 Issued
Array ( [id] => 5316035 [patent_doc_number] => 20090280633 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-12 [patent_title] => 'METHOD OF FORMING SELF-ALIGNED CONTACTS AND LOCAL INTERCONNECTS' [patent_app_type] => utility [patent_app_number] => 12/505669 [patent_app_country] => US [patent_app_date] => 2009-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3549 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0280/20090280633.pdf [firstpage_image] =>[orig_patent_app_number] => 12505669 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/505669
Method of forming self-aligned contacts and local interconnects Jul 19, 2009 Issued
Array ( [id] => 6130616 [patent_doc_number] => 20110006371 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-13 [patent_title] => 'INDUCING STRESS IN CMOS DEVICE' [patent_app_type] => utility [patent_app_number] => 12/500107 [patent_app_country] => US [patent_app_date] => 2009-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 3815 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20110006371.pdf [firstpage_image] =>[orig_patent_app_number] => 12500107 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/500107
Inducing stress in CMOS device Jul 8, 2009 Issued
Array ( [id] => 8386088 [patent_doc_number] => 08263483 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-11 [patent_title] => 'Method including producing a monocrystalline layer' [patent_app_type] => utility [patent_app_number] => 12/498418 [patent_app_country] => US [patent_app_date] => 2009-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2671 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12498418 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/498418
Method including producing a monocrystalline layer Jul 6, 2009 Issued
Array ( [id] => 6518982 [patent_doc_number] => 20100123211 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-20 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING A HIGH ASPECT RATIO ISOLATION TRENCH AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/494907 [patent_app_country] => US [patent_app_date] => 2009-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3600 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0123/20100123211.pdf [firstpage_image] =>[orig_patent_app_number] => 12494907 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/494907
Semiconductor device having a high aspect ratio isolation trench Jun 29, 2009 Issued
Array ( [id] => 6369094 [patent_doc_number] => 20100314738 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-16 [patent_title] => 'INTEGRATED CIRCUIT PACKAGING SYSTEM WITH A STACK PACKAGE AND METHOD OF MANUFACTURE THEREOF' [patent_app_type] => utility [patent_app_number] => 12/484158 [patent_app_country] => US [patent_app_date] => 2009-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5050 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0314/20100314738.pdf [firstpage_image] =>[orig_patent_app_number] => 12484158 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/484158
Integrated circuit packaging system with a stack package and method of manufacture thereof Jun 11, 2009 Issued
Array ( [id] => 5469735 [patent_doc_number] => 20090242901 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-01 [patent_title] => 'SiC MOSFETS AND SELF-ALIGNED FABRICATION METHODS THEREOF' [patent_app_type] => utility [patent_app_number] => 12/483469 [patent_app_country] => US [patent_app_date] => 2009-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6624 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0242/20090242901.pdf [firstpage_image] =>[orig_patent_app_number] => 12483469 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/483469
SiC MOSFETs and self-aligned fabrication methods thereof Jun 11, 2009 Issued
Array ( [id] => 6393523 [patent_doc_number] => 20100164118 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-01 [patent_title] => 'METHOD FOR FABRICATING SEMICONDUCTOR DEVICE INCLUDING METAL CONTACT' [patent_app_type] => utility [patent_app_number] => 12/483558 [patent_app_country] => US [patent_app_date] => 2009-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 7777 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20100164118.pdf [firstpage_image] =>[orig_patent_app_number] => 12483558 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/483558
METHOD FOR FABRICATING SEMICONDUCTOR DEVICE INCLUDING METAL CONTACT Jun 11, 2009 Abandoned
Array ( [id] => 8282798 [patent_doc_number] => 08216900 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-10 [patent_title] => 'Nonvolatile memory device, method of manufacturing the nonvolatile memory device, and method of manufacturing flat panel display device provided with the nonvolatile memory device' [patent_app_type] => utility [patent_app_number] => 12/471967 [patent_app_country] => US [patent_app_date] => 2009-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2345 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12471967 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/471967
Nonvolatile memory device, method of manufacturing the nonvolatile memory device, and method of manufacturing flat panel display device provided with the nonvolatile memory device May 25, 2009 Issued
Array ( [id] => 5549835 [patent_doc_number] => 20090283821 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-19 [patent_title] => 'NONVOLATILE MEMORY AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/467717 [patent_app_country] => US [patent_app_date] => 2009-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3029 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0283/20090283821.pdf [firstpage_image] =>[orig_patent_app_number] => 12467717 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/467717
Nonvolatile memory May 17, 2009 Issued
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