Search

Toniae M. Thomas

Examiner (ID: 17248)

Most Active Art Unit
2822
Art Unit(s)
1104, 1763, 2822, 2813
Total Applications
1101
Issued Applications
969
Pending Applications
9
Abandoned Applications
127

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9414119 [patent_doc_number] => 08698156 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-15 [patent_title] => 'Laminating system' [patent_app_type] => utility [patent_app_number] => 12/403988 [patent_app_country] => US [patent_app_date] => 2009-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 22 [patent_no_of_words] => 7967 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12403988 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/403988
Laminating system Mar 12, 2009 Issued
Array ( [id] => 5530646 [patent_doc_number] => 20090230434 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-17 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/402758 [patent_app_country] => US [patent_app_date] => 2009-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7579 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0230/20090230434.pdf [firstpage_image] =>[orig_patent_app_number] => 12402758 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/402758
Semiconductor memory device Mar 11, 2009 Issued
Array ( [id] => 5383070 [patent_doc_number] => 20090224314 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-10 [patent_title] => 'SEMICONDUCTOR DEVICE AND THE METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/401257 [patent_app_country] => US [patent_app_date] => 2009-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4670 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0224/20090224314.pdf [firstpage_image] =>[orig_patent_app_number] => 12401257 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/401257
SEMICONDUCTOR DEVICE AND THE METHOD OF MANUFACTURING THE SAME Mar 9, 2009 Abandoned
Array ( [id] => 7724222 [patent_doc_number] => 08097492 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-01-17 [patent_title] => 'Method and manufacture of silicon based package and devices manufactured thereby' [patent_app_type] => utility [patent_app_number] => 12/344095 [patent_app_country] => US [patent_app_date] => 2008-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 49 [patent_no_of_words] => 11328 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/097/08097492.pdf [firstpage_image] =>[orig_patent_app_number] => 12344095 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/344095
Method and manufacture of silicon based package and devices manufactured thereby Dec 23, 2008 Issued
Array ( [id] => 6609485 [patent_doc_number] => 20100323458 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-23 [patent_title] => 'METHOD FOR MAKING P(VDF/TrFE) COPOLYMER LAYER SENSORS, AND CORRESPONDING SENSOR' [patent_app_type] => utility [patent_app_number] => 12/808728 [patent_app_country] => US [patent_app_date] => 2008-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5187 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0323/20100323458.pdf [firstpage_image] =>[orig_patent_app_number] => 12808728 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/808728
METHOD FOR MAKING P(VDF/TrFE) COPOLYMER LAYER SENSORS, AND CORRESPONDING SENSOR Dec 10, 2008 Abandoned
Array ( [id] => 4574177 [patent_doc_number] => 07858961 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-28 [patent_title] => 'Phase change memory devices and methods for fabricating the same' [patent_app_type] => utility [patent_app_number] => 12/325067 [patent_app_country] => US [patent_app_date] => 2008-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 21 [patent_no_of_words] => 4893 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/858/07858961.pdf [firstpage_image] =>[orig_patent_app_number] => 12325067 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/325067
Phase change memory devices and methods for fabricating the same Nov 27, 2008 Issued
Array ( [id] => 5268503 [patent_doc_number] => 20090072278 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-19 [patent_title] => 'Method for Applying a Stress Layer to a Semiconductor Device and Device Formed Therefrom' [patent_app_type] => utility [patent_app_number] => 12/272416 [patent_app_country] => US [patent_app_date] => 2008-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7045 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0072/20090072278.pdf [firstpage_image] =>[orig_patent_app_number] => 12272416 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/272416
Method for Applying a Stress Layer to a Semiconductor Device and Device Formed Therefrom Nov 16, 2008 Abandoned
Array ( [id] => 7738786 [patent_doc_number] => 20120018779 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-26 [patent_title] => 'METHOD FOR PRODUCING MICROMECHANICAL PATTERNS HAVING A RELIEF-LIKE SIDEWALL OUTLINE SHAPE OR AN ADJUSTABLE ANGLE OF INCLINATION' [patent_app_type] => utility [patent_app_number] => 12/740607 [patent_app_country] => US [patent_app_date] => 2008-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6315 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20120018779.pdf [firstpage_image] =>[orig_patent_app_number] => 12740607 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/740607
Method for producing micromechanical patterns having a relief-like sidewall outline shape or an adjustable angle of inclination Oct 12, 2008 Issued
Array ( [id] => 5521543 [patent_doc_number] => 20090029524 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-29 [patent_title] => 'METHOD OF MANUFACTURING A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE HAVING A TRENCH' [patent_app_type] => utility [patent_app_number] => 12/244621 [patent_app_country] => US [patent_app_date] => 2008-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 9482 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0029/20090029524.pdf [firstpage_image] =>[orig_patent_app_number] => 12244621 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/244621
METHOD OF MANUFACTURING A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE HAVING A TRENCH Oct 1, 2008 Abandoned
Array ( [id] => 5308813 [patent_doc_number] => 20090016094 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-15 [patent_title] => 'Selection device for Re-Writable memory' [patent_app_type] => utility [patent_app_number] => 12/283339 [patent_app_country] => US [patent_app_date] => 2008-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 14400 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0016/20090016094.pdf [firstpage_image] =>[orig_patent_app_number] => 12283339 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/283339
Selection device for re-writable memory Sep 10, 2008 Issued
Array ( [id] => 4483811 [patent_doc_number] => 07902053 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-08 [patent_title] => 'Method of processing semiconductor wafer' [patent_app_type] => utility [patent_app_number] => 12/199547 [patent_app_country] => US [patent_app_date] => 2008-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 3717 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/902/07902053.pdf [firstpage_image] =>[orig_patent_app_number] => 12199547 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/199547
Method of processing semiconductor wafer Aug 26, 2008 Issued
Array ( [id] => 4164 [patent_doc_number] => 07816252 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-19 [patent_title] => 'Method for forming bumps on under bump metallurgy' [patent_app_type] => utility [patent_app_number] => 12/199638 [patent_app_country] => US [patent_app_date] => 2008-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 21 [patent_no_of_words] => 1944 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/816/07816252.pdf [firstpage_image] =>[orig_patent_app_number] => 12199638 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/199638
Method for forming bumps on under bump metallurgy Aug 26, 2008 Issued
Array ( [id] => 14625 [patent_doc_number] => 07804130 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-09-28 [patent_title] => 'Self-aligned V-channel MOSFET' [patent_app_type] => utility [patent_app_number] => 12/198507 [patent_app_country] => US [patent_app_date] => 2008-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 3164 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/804/07804130.pdf [firstpage_image] =>[orig_patent_app_number] => 12198507 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/198507
Self-aligned V-channel MOSFET Aug 25, 2008 Issued
Array ( [id] => 5323606 [patent_doc_number] => 20090061596 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-05 [patent_title] => 'EXPANDING TOOL, EXPANDING METHOD, AND MANUFACTURING METHOD OF UNIT ELEMENTS' [patent_app_type] => utility [patent_app_number] => 12/197418 [patent_app_country] => US [patent_app_date] => 2008-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4168 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0061/20090061596.pdf [firstpage_image] =>[orig_patent_app_number] => 12197418 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/197418
EXPANDING TOOL, EXPANDING METHOD, AND MANUFACTURING METHOD OF UNIT ELEMENTS Aug 24, 2008 Abandoned
Array ( [id] => 6473476 [patent_doc_number] => 20100041191 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-18 [patent_title] => 'SPLIT-GATE DRAM WITH MUGFET, DESIGN STRUCTURE, AND METHOD OF MANUFACTURE' [patent_app_type] => utility [patent_app_number] => 12/192537 [patent_app_country] => US [patent_app_date] => 2008-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 5944 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0041/20100041191.pdf [firstpage_image] =>[orig_patent_app_number] => 12192537 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/192537
Split-gate DRAM with MuGFET, design structure, and method of manufacture Aug 14, 2008 Issued
Array ( [id] => 7522979 [patent_doc_number] => 08026135 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-27 [patent_title] => 'Formation of shallow junctions by diffusion from a dielectric doped by cluster or molecular ion beams' [patent_app_type] => utility [patent_app_number] => 12/190337 [patent_app_country] => US [patent_app_date] => 2008-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 5988 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/026/08026135.pdf [firstpage_image] =>[orig_patent_app_number] => 12190337 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/190337
Formation of shallow junctions by diffusion from a dielectric doped by cluster or molecular ion beams Aug 11, 2008 Issued
Array ( [id] => 6255099 [patent_doc_number] => 20100029045 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-04 [patent_title] => 'PACKAGING AN INTEGRATED CIRCUIT DIE WITH BACKSIDE METALLIZATION' [patent_app_type] => utility [patent_app_number] => 12/184377 [patent_app_country] => US [patent_app_date] => 2008-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5238 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0029/20100029045.pdf [firstpage_image] =>[orig_patent_app_number] => 12184377 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/184377
Packaging an integrated circuit die with backside metallization Jul 31, 2008 Issued
Array ( [id] => 121492 [patent_doc_number] => 07709333 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-04 [patent_title] => 'Method for reducing overlap capacitance in field effect transistors' [patent_app_type] => utility [patent_app_number] => 12/173098 [patent_app_country] => US [patent_app_date] => 2008-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 33 [patent_no_of_words] => 4488 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/709/07709333.pdf [firstpage_image] =>[orig_patent_app_number] => 12173098 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/173098
Method for reducing overlap capacitance in field effect transistors Jul 14, 2008 Issued
Array ( [id] => 4474344 [patent_doc_number] => 07867804 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-11 [patent_title] => 'Semiconductor device and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 12/168088 [patent_app_country] => US [patent_app_date] => 2008-07-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2552 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/867/07867804.pdf [firstpage_image] =>[orig_patent_app_number] => 12168088 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/168088
Semiconductor device and method for fabricating the same Jul 3, 2008 Issued
Array ( [id] => 5361090 [patent_doc_number] => 20090035884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-05 [patent_title] => 'METHOD FOR MANUFACTURING SURFACE-EMITTING LASER' [patent_app_type] => utility [patent_app_number] => 12/166378 [patent_app_country] => US [patent_app_date] => 2008-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5308 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0035/20090035884.pdf [firstpage_image] =>[orig_patent_app_number] => 12166378 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/166378
Method for manufacturing surface-emitting laser Jul 1, 2008 Issued
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