Toniae M. Thomas

Array ( [id] => 6255971 [patent_doc_number] => 20100295061 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-25 [patent_title] => 'RECRYSTALLIZATION OF SEMICONDUCTOR WATERS IN A THIN FILM CAPSULE AND RELATED PROCESSES' [patent_app_type] => utility [patent_app_number] => 12/665495 [patent_app_country] => US [patent_app_date] => 2008-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 15285 [patent_no_of_claims] => 109 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0295/20100295061.pdf [firstpage_image] =>[orig_patent_app_number] => 12665495 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4887078 [patent_doc_number] => 20080261410 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-23 [patent_title] => 'METHOD FOR TREATING BASE OXIDE TO IMPROVE HIGH-K MATERIAL DEPOSITION' [patent_app_type] => utility [patent_app_number] => 12/145621 [patent_app_country] => US [patent_app_date] => 2008-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4392 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0261/20080261410.pdf [firstpage_image] =>[orig_patent_app_number] => 12145621 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7545391 [patent_doc_number] => 08053362 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-08 [patent_title] => 'Method of forming metal electrode of system in package' [patent_app_type] => utility [patent_app_number] => 12/140558 [patent_app_country] => US [patent_app_date] => 2008-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3116 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/053/08053362.pdf [firstpage_image] =>[orig_patent_app_number] => 12140558 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4679862 [patent_doc_number] => 20080246088 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-09 [patent_title] => 'Self-Aligned Lightly Doped Drain Recessed-Gate Thin-Film Transistor' [patent_app_type] => utility [patent_app_number] => 12/140017 [patent_app_country] => US [patent_app_date] => 2008-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4993 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0246/20080246088.pdf [firstpage_image] =>[orig_patent_app_number] => 12140017 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8555069 [patent_doc_number] => 08329541 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-11 [patent_title] => 'InP-based transistor fabrication' [patent_app_type] => utility [patent_app_number] => 12/139010 [patent_app_country] => US [patent_app_date] => 2008-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 22 [patent_no_of_words] => 10449 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12139010 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4715342 [patent_doc_number] => 20080237864 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-02 [patent_title] => 'METAL INTERCONNECTION STRUCTURE OF A SEMICONDUCTOR DEVICE HAVING LOW RESISTANCE AND METHOD OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/136497 [patent_app_country] => US [patent_app_date] => 2008-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3040 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20080237864.pdf [firstpage_image] =>[orig_patent_app_number] => 12136497 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8005903 [patent_doc_number] => 08084352 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-12-27 [patent_title] => 'Method of manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/131968 [patent_app_country] => US [patent_app_date] => 2008-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 73 [patent_no_of_words] => 12353 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/084/08084352.pdf [firstpage_image] =>[orig_patent_app_number] => 12131968 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5300220 [patent_doc_number] => 20090294872 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-03 [patent_title] => 'Ge/Xe IMPLANTS TO REDUCE JUNCTION CAPACITANCE AND LEAKAGE' [patent_app_type] => utility [patent_app_number] => 12/128938 [patent_app_country] => US [patent_app_date] => 2008-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1571 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0294/20090294872.pdf [firstpage_image] =>[orig_patent_app_number] => 12128938 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5285021 [patent_doc_number] => 20090098696 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-16 [patent_title] => 'Fabrication Process of a Semiconductor Device Having a Capacitor' [patent_app_type] => utility [patent_app_number] => 12/127067 [patent_app_country] => US [patent_app_date] => 2008-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 10592 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20090098696.pdf [firstpage_image] =>[orig_patent_app_number] => 12127067 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4698402 [patent_doc_number] => 20080220586 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-11 [patent_title] => 'METHODS FOR FORMING SEMICONDUCTOR STRUCTURES WITH BURIED ISOLATION COLLARS AND SEMICONDUCTOR STRUCTURES FORMED BY THESE METHODS' [patent_app_type] => utility [patent_app_number] => 12/125357 [patent_app_country] => US [patent_app_date] => 2008-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8296 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0220/20080220586.pdf [firstpage_image] =>[orig_patent_app_number] => 12125357 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4495714 [patent_doc_number] => 07947573 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-24 [patent_title] => 'Structure combining an IC integrated substrate and a carrier, and method of manufacturing such structure' [patent_app_type] => utility [patent_app_number] => 12/121037 [patent_app_country] => US [patent_app_date] => 2008-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4407 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/947/07947573.pdf [firstpage_image] =>[orig_patent_app_number] => 12121037 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4676359 [patent_doc_number] => 20080213989 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-04 [patent_title] => 'SILICON WAFER FOR MANUFACTURING SOI WAFER, SOI WAFER, AND METHOD FOR MANUFACTURING SOI WAFER' [patent_app_type] => utility [patent_app_number] => 12/118928 [patent_app_country] => US [patent_app_date] => 2008-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4042 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0213/20080213989.pdf [firstpage_image] =>[orig_patent_app_number] => 12118928 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6235530 [patent_doc_number] => 20100267234 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-21 [patent_title] => 'FOCUSED ION BEAM DEEP NANO-PATTERNING APPARATUS AND METHOD' [patent_app_type] => utility [patent_app_number] => 12/598228 [patent_app_country] => US [patent_app_date] => 2008-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4177 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0267/20100267234.pdf [firstpage_image] =>[orig_patent_app_number] => 12598228 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7773931 [patent_doc_number] => 08119491 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-21 [patent_title] => 'Methods of fabricating passive element without planarizing and related semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/106374 [patent_app_country] => US [patent_app_date] => 2008-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 2782 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/119/08119491.pdf [firstpage_image] =>[orig_patent_app_number] => 12106374 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4887015 [patent_doc_number] => 20080261347 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-23 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR FILM AND METHOD OF MANUFACTURING PHOTOVOLTAIC ELEMENT' [patent_app_type] => utility [patent_app_number] => 12/105469 [patent_app_country] => US [patent_app_date] => 2008-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4250 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0261/20080261347.pdf [firstpage_image] =>[orig_patent_app_number] => 12105469 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5441458 [patent_doc_number] => 20090093097 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-09 [patent_title] => 'Method for Manufacturing Dual Gate in Semiconductor Device' [patent_app_type] => utility [patent_app_number] => 12/104819 [patent_app_country] => US [patent_app_date] => 2008-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2372 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0093/20090093097.pdf [firstpage_image] =>[orig_patent_app_number] => 12104819 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4822032 [patent_doc_number] => 20080227230 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-18 [patent_title] => 'Quantum dot vertical cavity surface emitting laser and fabrication method of the same' [patent_app_type] => utility [patent_app_number] => 12/081367 [patent_app_country] => US [patent_app_date] => 2008-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3203 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0227/20080227230.pdf [firstpage_image] =>[orig_patent_app_number] => 12081367 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4663647 [patent_doc_number] => 20080254554 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-16 [patent_title] => 'METHOD FOR PRODUCING OPTICAL COUPLING ELEMENT' [patent_app_type] => utility [patent_app_number] => 12/099830 [patent_app_country] => US [patent_app_date] => 2008-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5199 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0254/20080254554.pdf [firstpage_image] =>[orig_patent_app_number] => 12099830 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4696806 [patent_doc_number] => 20080218990 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-11 [patent_title] => 'ELECTRONIC COMPONENTS ON TRENCHED SUBSTRATES AND METHOD OF FORMING SAME' [patent_app_type] => utility [patent_app_number] => 12/099381 [patent_app_country] => US [patent_app_date] => 2008-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 1632 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0218/20080218990.pdf [firstpage_image] =>[orig_patent_app_number] => 12099381 [rel_patent_id] =>[rel_patent_doc_number] =>)