Search

Toniae M. Thomas

Examiner (ID: 10576)

Most Active Art Unit
2822
Art Unit(s)
1763, 2822, 2813, 1104
Total Applications
1101
Issued Applications
969
Pending Applications
9
Abandoned Applications
127

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5582759 [patent_doc_number] => 20090101961 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-23 [patent_title] => 'MEMORY DEVICES WITH SPLIT GATE AND BLOCKING LAYER' [patent_app_type] => utility [patent_app_number] => 11/876557 [patent_app_country] => US [patent_app_date] => 2007-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3532 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0101/20090101961.pdf [firstpage_image] =>[orig_patent_app_number] => 11876557 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/876557
MEMORY DEVICES WITH SPLIT GATE AND BLOCKING LAYER Oct 21, 2007 Abandoned
Array ( [id] => 4651655 [patent_doc_number] => 20080038911 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-14 [patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 11/874928 [patent_app_country] => US [patent_app_date] => 2007-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3495 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0038/20080038911.pdf [firstpage_image] =>[orig_patent_app_number] => 11874928 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/874928
Method for manufacturing semiconductor device Oct 18, 2007 Issued
Array ( [id] => 4669923 [patent_doc_number] => 20080044983 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-21 [patent_title] => 'Element formation substrate, method of manufacturing the same, and semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/907354 [patent_app_country] => US [patent_app_date] => 2007-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5072 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0044/20080044983.pdf [firstpage_image] =>[orig_patent_app_number] => 11907354 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/907354
Element formation substrate, method of manufacturing the same, and semiconductor device Oct 10, 2007 Issued
Array ( [id] => 581874 [patent_doc_number] => 07449383 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-11-11 [patent_title] => 'Method of manufacturing a capacitor and method of manufacturing a dynamic random access memory device using the same' [patent_app_type] => utility [patent_app_number] => 11/898667 [patent_app_country] => US [patent_app_date] => 2007-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5367 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/449/07449383.pdf [firstpage_image] =>[orig_patent_app_number] => 11898667 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/898667
Method of manufacturing a capacitor and method of manufacturing a dynamic random access memory device using the same Sep 13, 2007 Issued
Array ( [id] => 4930443 [patent_doc_number] => 20080001218 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-03 [patent_title] => 'Metal Oxide Semiconductor (MOS) Transistors Having Three Dimensional Channels' [patent_app_type] => utility [patent_app_number] => 11/854734 [patent_app_country] => US [patent_app_date] => 2007-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 7617 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20080001218.pdf [firstpage_image] =>[orig_patent_app_number] => 11854734 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/854734
Metal oxide semiconductor (MOS) transistors having three dimensional channels Sep 12, 2007 Issued
Array ( [id] => 7490294 [patent_doc_number] => 08030120 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-04 [patent_title] => 'Hybrid window layer for photovoltaic cells' [patent_app_type] => utility [patent_app_number] => 11/899797 [patent_app_country] => US [patent_app_date] => 2007-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 5639 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/030/08030120.pdf [firstpage_image] =>[orig_patent_app_number] => 11899797 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/899797
Hybrid window layer for photovoltaic cells Sep 6, 2007 Issued
Array ( [id] => 4930389 [patent_doc_number] => 20080001164 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-03 [patent_title] => 'Flip chip type LED lighting device manufacturing method' [patent_app_type] => utility [patent_app_number] => 11/896778 [patent_app_country] => US [patent_app_date] => 2007-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1351 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20080001164.pdf [firstpage_image] =>[orig_patent_app_number] => 11896778 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/896778
Flip chip type LED lighting device manufacturing method Sep 5, 2007 Issued
Array ( [id] => 5199254 [patent_doc_number] => 20070298572 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-27 [patent_title] => 'FIELD EFFECT TRANSISTORS (FETs) WITH MULTIPLE AND/OR STAIRCASE SILICIDE' [patent_app_type] => utility [patent_app_number] => 11/850076 [patent_app_country] => US [patent_app_date] => 2007-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 3660 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0298/20070298572.pdf [firstpage_image] =>[orig_patent_app_number] => 11850076 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/850076
Field effect transistors (FETs) with multiple and/or staircase silicide Sep 4, 2007 Issued
Array ( [id] => 583262 [patent_doc_number] => 07445982 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-11-04 [patent_title] => 'Method of manufacturing a semiconductor integrated circuit device' [patent_app_type] => utility [patent_app_number] => 11/892928 [patent_app_country] => US [patent_app_date] => 2007-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5652 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 526 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/445/07445982.pdf [firstpage_image] =>[orig_patent_app_number] => 11892928 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/892928
Method of manufacturing a semiconductor integrated circuit device Aug 27, 2007 Issued
Array ( [id] => 583282 [patent_doc_number] => 07445983 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-11-04 [patent_title] => 'Method of manufacturing a semiconductor integrated circuit device' [patent_app_type] => utility [patent_app_number] => 11/892929 [patent_app_country] => US [patent_app_date] => 2007-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5652 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 765 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/445/07445983.pdf [firstpage_image] =>[orig_patent_app_number] => 11892929 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/892929
Method of manufacturing a semiconductor integrated circuit device Aug 27, 2007 Issued
Array ( [id] => 4704608 [patent_doc_number] => 20080064132 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-13 [patent_title] => 'Method of fabricating vertical devices using a metal support film' [patent_app_type] => utility [patent_app_number] => 11/882575 [patent_app_country] => US [patent_app_date] => 2007-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6397 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0064/20080064132.pdf [firstpage_image] =>[orig_patent_app_number] => 11882575 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/882575
Method of fabricating vertical devices using a metal support film Aug 1, 2007 Issued
Array ( [id] => 4663682 [patent_doc_number] => 20080254589 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-16 [patent_title] => 'METHOD FOR MANUFACTURING COLLARS OF DEEP TRENCH CAPACITORS' [patent_app_type] => utility [patent_app_number] => 11/829067 [patent_app_country] => US [patent_app_date] => 2007-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1047 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0254/20080254589.pdf [firstpage_image] =>[orig_patent_app_number] => 11829067 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/829067
METHOD FOR MANUFACTURING COLLARS OF DEEP TRENCH CAPACITORS Jul 25, 2007 Abandoned
Array ( [id] => 5014090 [patent_doc_number] => 20070257298 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-08 [patent_title] => 'MEMORY CELL WITH REDUCED SIZE AND STANDBY CURRENT' [patent_app_type] => utility [patent_app_number] => 11/777498 [patent_app_country] => US [patent_app_date] => 2007-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4408 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0257/20070257298.pdf [firstpage_image] =>[orig_patent_app_number] => 11777498 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/777498
MEMORY CELL WITH REDUCED SIZE AND STANDBY CURRENT Jul 12, 2007 Abandoned
Array ( [id] => 6543711 [patent_doc_number] => 20100044684 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-25 [patent_title] => 'BLENDED POLYMER FETS' [patent_app_type] => utility [patent_app_number] => 12/306432 [patent_app_country] => US [patent_app_date] => 2007-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 11996 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0044/20100044684.pdf [firstpage_image] =>[orig_patent_app_number] => 12306432 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/306432
Blended polymer FETs Jun 28, 2007 Issued
Array ( [id] => 4578311 [patent_doc_number] => 07825441 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-02 [patent_title] => 'Junction field effect transistor with a hyperabrupt junction' [patent_app_type] => utility [patent_app_number] => 11/767627 [patent_app_country] => US [patent_app_date] => 2007-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 10665 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/825/07825441.pdf [firstpage_image] =>[orig_patent_app_number] => 11767627 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/767627
Junction field effect transistor with a hyperabrupt junction Jun 24, 2007 Issued
Array ( [id] => 141981 [patent_doc_number] => 07691757 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-06 [patent_title] => 'Deposition of complex nitride films' [patent_app_type] => utility [patent_app_number] => 11/766718 [patent_app_country] => US [patent_app_date] => 2007-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3137 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/691/07691757.pdf [firstpage_image] =>[orig_patent_app_number] => 11766718 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/766718
Deposition of complex nitride films Jun 20, 2007 Issued
Array ( [id] => 4756647 [patent_doc_number] => 20080308872 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-18 [patent_title] => 'CMOS TRANSISTORS WITH DIFFERENTIAL OXYGEN CONTENT HIGH-K DIELECTRICS' [patent_app_type] => utility [patent_app_number] => 11/763047 [patent_app_country] => US [patent_app_date] => 2007-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8823 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0308/20080308872.pdf [firstpage_image] =>[orig_patent_app_number] => 11763047 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/763047
CMOS transistors with differential oxygen content high-k dielectrics Jun 13, 2007 Issued
Array ( [id] => 334611 [patent_doc_number] => 07508023 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-03-24 [patent_title] => 'Capacitor structure and fabricating method thereof' [patent_app_type] => utility [patent_app_number] => 11/758011 [patent_app_country] => US [patent_app_date] => 2007-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 2967 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/508/07508023.pdf [firstpage_image] =>[orig_patent_app_number] => 11758011 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/758011
Capacitor structure and fabricating method thereof Jun 4, 2007 Issued
Array ( [id] => 4688271 [patent_doc_number] => 20080032452 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-07 [patent_title] => 'CHIP SCALE PACKAGE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/757795 [patent_app_country] => US [patent_app_date] => 2007-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2575 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0032/20080032452.pdf [firstpage_image] =>[orig_patent_app_number] => 11757795 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/757795
Chip scale package and method for manufacturing the same Jun 3, 2007 Issued
Array ( [id] => 4922058 [patent_doc_number] => 20080070373 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-20 [patent_title] => 'MANUFACTURING METHOD OF A MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 11/752177 [patent_app_country] => US [patent_app_date] => 2007-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2244 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20080070373.pdf [firstpage_image] =>[orig_patent_app_number] => 11752177 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/752177
Manufacturing method of a memory device May 21, 2007 Issued
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