Search

Toniae M. Thomas

Examiner (ID: 10576)

Most Active Art Unit
2822
Art Unit(s)
1763, 2822, 2813, 1104
Total Applications
1101
Issued Applications
969
Pending Applications
9
Abandoned Applications
127

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4944103 [patent_doc_number] => 20080081428 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-03 [patent_title] => 'Method of Manufacturing Flash Memory Device' [patent_app_type] => utility [patent_app_number] => 11/749237 [patent_app_country] => US [patent_app_date] => 2007-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1279 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0081/20080081428.pdf [firstpage_image] =>[orig_patent_app_number] => 11749237 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/749237
Method of Manufacturing Flash Memory Device May 15, 2007 Abandoned
Array ( [id] => 7592903 [patent_doc_number] => 07652298 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-01-26 [patent_title] => 'Flip chip type LED lighting device manufacturing method' [patent_app_type] => utility [patent_app_number] => 11/798511 [patent_app_country] => US [patent_app_date] => 2007-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1351 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/652/07652298.pdf [firstpage_image] =>[orig_patent_app_number] => 11798511 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/798511
Flip chip type LED lighting device manufacturing method May 14, 2007 Issued
Array ( [id] => 4749102 [patent_doc_number] => 20080157173 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-03 [patent_title] => 'FLASH MEMORY DEVICE AND METHOD OF ERASING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/748137 [patent_app_country] => US [patent_app_date] => 2007-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1621 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20080157173.pdf [firstpage_image] =>[orig_patent_app_number] => 11748137 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/748137
Flash memory device and method of erasing the same May 13, 2007 Issued
Array ( [id] => 4462390 [patent_doc_number] => 07880268 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-01 [patent_title] => 'MIM capacitor' [patent_app_type] => utility [patent_app_number] => 11/746177 [patent_app_country] => US [patent_app_date] => 2007-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2893 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/880/07880268.pdf [firstpage_image] =>[orig_patent_app_number] => 11746177 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/746177
MIM capacitor May 8, 2007 Issued
Array ( [id] => 588723 [patent_doc_number] => 07442986 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-28 [patent_title] => 'Nonvolatile semiconductor memory device with tapered sidewall gate and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/797839 [patent_app_country] => US [patent_app_date] => 2007-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 26 [patent_no_of_words] => 9045 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/442/07442986.pdf [firstpage_image] =>[orig_patent_app_number] => 11797839 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/797839
Nonvolatile semiconductor memory device with tapered sidewall gate and method of manufacturing the same May 7, 2007 Issued
Array ( [id] => 583536 [patent_doc_number] => 07446004 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-11-04 [patent_title] => 'Method for reducing overlap capacitance in field effect transistors' [patent_app_type] => utility [patent_app_number] => 11/741034 [patent_app_country] => US [patent_app_date] => 2007-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 33 [patent_no_of_words] => 4447 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/446/07446004.pdf [firstpage_image] =>[orig_patent_app_number] => 11741034 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/741034
Method for reducing overlap capacitance in field effect transistors Apr 26, 2007 Issued
Array ( [id] => 5199240 [patent_doc_number] => 20070298558 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-27 [patent_title] => 'METHOD OF FABRICATING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 11/738687 [patent_app_country] => US [patent_app_date] => 2007-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 11299 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0298/20070298558.pdf [firstpage_image] =>[orig_patent_app_number] => 11738687 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/738687
METHOD OF FABRICATING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE Apr 22, 2007 Abandoned
Array ( [id] => 103746 [patent_doc_number] => 07723771 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-25 [patent_title] => 'Zirconium oxide based capacitor and process to manufacture the same' [patent_app_type] => utility [patent_app_number] => 11/731457 [patent_app_country] => US [patent_app_date] => 2007-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2068 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/723/07723771.pdf [firstpage_image] =>[orig_patent_app_number] => 11731457 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/731457
Zirconium oxide based capacitor and process to manufacture the same Mar 29, 2007 Issued
Array ( [id] => 5157483 [patent_doc_number] => 20070170527 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-26 [patent_title] => 'STRUCTURE FOR REDUCING OVERLAP CAPACITANCE IN FIELD EFFECT TRANSISTORS' [patent_app_type] => utility [patent_app_number] => 11/692453 [patent_app_country] => US [patent_app_date] => 2007-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 4185 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0170/20070170527.pdf [firstpage_image] =>[orig_patent_app_number] => 11692453 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/692453
Structure for reducing overlap capacitance in field effect transistors Mar 27, 2007 Issued
Array ( [id] => 5163057 [patent_doc_number] => 20070284638 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-13 [patent_title] => 'Conductive container structures having a dielectric cap' [patent_app_type] => utility [patent_app_number] => 11/728912 [patent_app_country] => US [patent_app_date] => 2007-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4652 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0284/20070284638.pdf [firstpage_image] =>[orig_patent_app_number] => 11728912 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/728912
Conductive container structures having a dielectric cap Mar 26, 2007 Abandoned
Array ( [id] => 5101333 [patent_doc_number] => 20070184595 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-09 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 11/727033 [patent_app_country] => US [patent_app_date] => 2007-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3388 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0184/20070184595.pdf [firstpage_image] =>[orig_patent_app_number] => 11727033 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/727033
Semiconductor device and manufacturing method thereof Mar 22, 2007 Abandoned
Array ( [id] => 4977391 [patent_doc_number] => 20070218624 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-20 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/724247 [patent_app_country] => US [patent_app_date] => 2007-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5200 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0218/20070218624.pdf [firstpage_image] =>[orig_patent_app_number] => 11724247 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/724247
Semiconductor device and method of manufacturing the same Mar 14, 2007 Abandoned
Array ( [id] => 163128 [patent_doc_number] => 07671385 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-02 [patent_title] => 'Image sensor and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 11/686957 [patent_app_country] => US [patent_app_date] => 2007-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 2926 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/671/07671385.pdf [firstpage_image] =>[orig_patent_app_number] => 11686957 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/686957
Image sensor and fabrication method thereof Mar 14, 2007 Issued
Array ( [id] => 5063123 [patent_doc_number] => 20070224763 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-27 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/717707 [patent_app_country] => US [patent_app_date] => 2007-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 5483 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0224/20070224763.pdf [firstpage_image] =>[orig_patent_app_number] => 11717707 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/717707
Semiconductor device and method of manufacturing the same Mar 13, 2007 Issued
Array ( [id] => 836936 [patent_doc_number] => 07393751 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-07-01 [patent_title] => 'Semiconductor structure including laminated isolation region' [patent_app_type] => utility [patent_app_number] => 11/685457 [patent_app_country] => US [patent_app_date] => 2007-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 5151 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/393/07393751.pdf [firstpage_image] =>[orig_patent_app_number] => 11685457 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/685457
Semiconductor structure including laminated isolation region Mar 12, 2007 Issued
Array ( [id] => 7988913 [patent_doc_number] => 08076754 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-12-13 [patent_title] => 'Silicide-interface polysilicon resistor' [patent_app_type] => utility [patent_app_number] => 11/684277 [patent_app_country] => US [patent_app_date] => 2007-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 8 [patent_no_of_words] => 1823 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/076/08076754.pdf [firstpage_image] =>[orig_patent_app_number] => 11684277 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/684277
Silicide-interface polysilicon resistor Mar 8, 2007 Issued
Array ( [id] => 322525 [patent_doc_number] => 07517757 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-04-14 [patent_title] => 'Non-volatile memory device having dual gate and method of forming the same' [patent_app_type] => utility [patent_app_number] => 11/684237 [patent_app_country] => US [patent_app_date] => 2007-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 8304 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/517/07517757.pdf [firstpage_image] =>[orig_patent_app_number] => 11684237 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/684237
Non-volatile memory device having dual gate and method of forming the same Mar 8, 2007 Issued
Array ( [id] => 4533498 [patent_doc_number] => 07888194 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-15 [patent_title] => 'Method of fabricating semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/681987 [patent_app_country] => US [patent_app_date] => 2007-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 3985 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/888/07888194.pdf [firstpage_image] =>[orig_patent_app_number] => 11681987 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/681987
Method of fabricating semiconductor device Mar 4, 2007 Issued
Array ( [id] => 311374 [patent_doc_number] => 07528405 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-05-05 [patent_title] => 'Conductive memory stack with sidewall' [patent_app_type] => utility [patent_app_number] => 11/714555 [patent_app_country] => US [patent_app_date] => 2007-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 7096 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/528/07528405.pdf [firstpage_image] =>[orig_patent_app_number] => 11714555 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/714555
Conductive memory stack with sidewall Mar 4, 2007 Issued
Array ( [id] => 5019421 [patent_doc_number] => 20070145387 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-28 [patent_title] => 'LED HOUSING AND FABRICATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 11/680847 [patent_app_country] => US [patent_app_date] => 2007-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 4563 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0145/20070145387.pdf [firstpage_image] =>[orig_patent_app_number] => 11680847 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/680847
LED housing and fabrication method thereof Feb 28, 2007 Issued
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