Search

Toniae M. Thomas

Examiner (ID: 10576)

Most Active Art Unit
2822
Art Unit(s)
1763, 2822, 2813, 1104
Total Applications
1101
Issued Applications
969
Pending Applications
9
Abandoned Applications
127

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8153072 [patent_doc_number] => 08169026 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-01 [patent_title] => 'Stress-induced CMOS device' [patent_app_type] => utility [patent_app_number] => 13/242380 [patent_app_country] => US [patent_app_date] => 2011-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 3849 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/169/08169026.pdf [firstpage_image] =>[orig_patent_app_number] => 13242380 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/242380
Stress-induced CMOS device Sep 22, 2011 Issued
Array ( [id] => 9575096 [patent_doc_number] => 08765509 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-01 [patent_title] => 'Method for producing group III nitride semiconductor light-emitting device' [patent_app_type] => utility [patent_app_number] => 13/137997 [patent_app_country] => US [patent_app_date] => 2011-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 25 [patent_no_of_words] => 8854 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13137997 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/137997
Method for producing group III nitride semiconductor light-emitting device Sep 22, 2011 Issued
Array ( [id] => 7728244 [patent_doc_number] => 20120012935 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-19 [patent_title] => 'Semiconductor device and method of manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/137920 [patent_app_country] => US [patent_app_date] => 2011-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 9752 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20120012935.pdf [firstpage_image] =>[orig_patent_app_number] => 13137920 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/137920
Semiconductor device and method of manufacturing semiconductor device Sep 20, 2011 Issued
Array ( [id] => 7818049 [patent_doc_number] => 20120064669 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-15 [patent_title] => 'Manufacturing method of semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/137813 [patent_app_country] => US [patent_app_date] => 2011-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7119 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0064/20120064669.pdf [firstpage_image] =>[orig_patent_app_number] => 13137813 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/137813
Manufacturing method of semiconductor device Sep 13, 2011 Abandoned
Array ( [id] => 8694790 [patent_doc_number] => 20130056800 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-07 [patent_title] => 'Image Sensor With Reduced Noise By Blocking Nitridation Using Photoresist' [patent_app_type] => utility [patent_app_number] => 13/227400 [patent_app_country] => US [patent_app_date] => 2011-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5536 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13227400 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/227400
Image sensor with reduced noise by blocking nitridation using photoresist Sep 6, 2011 Issued
Array ( [id] => 8094905 [patent_doc_number] => 20120083064 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-05 [patent_title] => 'Process for solar cell module edge sealing' [patent_app_type] => utility [patent_app_number] => 13/137624 [patent_app_country] => US [patent_app_date] => 2011-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 871 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0083/20120083064.pdf [firstpage_image] =>[orig_patent_app_number] => 13137624 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/137624
Process for solar cell module edge sealing Aug 29, 2011 Abandoned
Array ( [id] => 9140203 [patent_doc_number] => 08580663 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-12 [patent_title] => 'Formation of shallow junctions by diffusion from a dielectronic doped by cluster or molecular ion beams' [patent_app_type] => utility [patent_app_number] => 13/217577 [patent_app_country] => US [patent_app_date] => 2011-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 6013 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13217577 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/217577
Formation of shallow junctions by diffusion from a dielectronic doped by cluster or molecular ion beams Aug 24, 2011 Issued
Array ( [id] => 7651431 [patent_doc_number] => 20110300700 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-08 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING A HIGH ASPECT RATIO ISOLATION TRENCH AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/210744 [patent_app_country] => US [patent_app_date] => 2011-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3599 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0300/20110300700.pdf [firstpage_image] =>[orig_patent_app_number] => 13210744 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/210744
Semiconductor device having a high aspect ratio isolation trench and method for manufacturing the same Aug 15, 2011 Issued
Array ( [id] => 8398335 [patent_doc_number] => 08268717 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-18 [patent_title] => 'Manufacturing method of bump structure with annular support' [patent_app_type] => utility [patent_app_number] => 13/209456 [patent_app_country] => US [patent_app_date] => 2011-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3866 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 317 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13209456 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/209456
Manufacturing method of bump structure with annular support Aug 14, 2011 Issued
Array ( [id] => 10831211 [patent_doc_number] => 08859378 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-14 [patent_title] => 'Fin field-effect transistor and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 13/377141 [patent_app_country] => US [patent_app_date] => 2011-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 31 [patent_no_of_words] => 4574 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13377141 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/377141
Fin field-effect transistor and method for manufacturing the same Aug 9, 2011 Issued
Array ( [id] => 8947645 [patent_doc_number] => 20130193425 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-01 [patent_title] => '\"Lighting Elements\"' [patent_app_type] => utility [patent_app_number] => 13/805741 [patent_app_country] => US [patent_app_date] => 2011-07-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4599 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13805741 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/805741
Lighting elements Jul 3, 2011 Issued
Array ( [id] => 9496488 [patent_doc_number] => 08735301 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-27 [patent_title] => 'Method for manufacturing semiconductor integrated circuit' [patent_app_type] => utility [patent_app_number] => 13/114053 [patent_app_country] => US [patent_app_date] => 2011-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2228 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13114053 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/114053
Method for manufacturing semiconductor integrated circuit May 23, 2011 Issued
Array ( [id] => 7580386 [patent_doc_number] => 20110294269 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-01 [patent_title] => 'Transistor With Embedded Strain-Inducing Material Formed in Diamond-Shaped Cavities Based on a Pre-Amorphization' [patent_app_type] => utility [patent_app_number] => 13/113698 [patent_app_country] => US [patent_app_date] => 2011-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8217 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0294/20110294269.pdf [firstpage_image] =>[orig_patent_app_number] => 13113698 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/113698
Transistor with embedded strain-inducing material formed in diamond-shaped cavities based on a pre-amorphization May 22, 2011 Issued
Array ( [id] => 9575172 [patent_doc_number] => 08765585 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-01 [patent_title] => 'Method of forming a borderless contact structure employing dual etch stop layers' [patent_app_type] => utility [patent_app_number] => 13/095955 [patent_app_country] => US [patent_app_date] => 2011-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7754 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13095955 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/095955
Method of forming a borderless contact structure employing dual etch stop layers Apr 27, 2011 Issued
Array ( [id] => 6063405 [patent_doc_number] => 20110201182 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-18 [patent_title] => 'NONVOLATIVE MEMORY DEVICE USING SEMICONDUCTOR NANOCRYSTALS AND METHOD OF FORMING SAME' [patent_app_type] => utility [patent_app_number] => 13/095577 [patent_app_country] => US [patent_app_date] => 2011-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7262 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0201/20110201182.pdf [firstpage_image] =>[orig_patent_app_number] => 13095577 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/095577
Nonvolative memory device using semiconductor nanocrystals and method of forming same Apr 26, 2011 Issued
Array ( [id] => 8784598 [patent_doc_number] => 08431441 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-30 [patent_title] => 'Semiconductor package and method of manufacturing same' [patent_app_type] => utility [patent_app_number] => 13/094316 [patent_app_country] => US [patent_app_date] => 2011-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 26 [patent_no_of_words] => 9940 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13094316 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/094316
Semiconductor package and method of manufacturing same Apr 25, 2011 Issued
Array ( [id] => 8465226 [patent_doc_number] => 20120270394 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-25 [patent_title] => 'METHOD OF BEVEL TRIMMING THREE DIMENSIONAL SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/093735 [patent_app_country] => US [patent_app_date] => 2011-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 1787 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13093735 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/093735
Method of bevel trimming three dimensional semiconductor device Apr 24, 2011 Issued
Array ( [id] => 6165916 [patent_doc_number] => 20110195538 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-11 [patent_title] => 'METHOD OF FABRICATING LIGHT EMITING DIODE CHIP' [patent_app_type] => utility [patent_app_number] => 13/089544 [patent_app_country] => US [patent_app_date] => 2011-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2599 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0195/20110195538.pdf [firstpage_image] =>[orig_patent_app_number] => 13089544 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/089544
Method of fabricating light emitting diode chip Apr 18, 2011 Issued
Array ( [id] => 8439630 [patent_doc_number] => 20120256247 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-11 [patent_title] => '3D Vertical NAND and Method of Making Thereof by Front and Back Side Processing' [patent_app_type] => utility [patent_app_number] => 13/083775 [patent_app_country] => US [patent_app_date] => 2011-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6082 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13083775 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/083775
3D vertical NAND and method of making thereof by front and back side processing Apr 10, 2011 Issued
Array ( [id] => 9482915 [patent_doc_number] => 08728866 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-20 [patent_title] => 'Method for manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/079055 [patent_app_country] => US [patent_app_date] => 2011-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 43 [patent_no_of_words] => 6213 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13079055 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/079055
Method for manufacturing semiconductor device Apr 3, 2011 Issued
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