Search

Toniae M. Thomas

Examiner (ID: 18536)

Most Active Art Unit
2822
Art Unit(s)
1763, 2822, 2813, 1104
Total Applications
1101
Issued Applications
969
Pending Applications
9
Abandoned Applications
127

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7567544 [patent_doc_number] => 20110287607 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-24 [patent_title] => 'METHOD AND APPARATUS FOR IMPROVED WAFER SINGULATION' [patent_app_type] => utility [patent_app_number] => 13/076238 [patent_app_country] => US [patent_app_date] => 2011-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 5480 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0287/20110287607.pdf [firstpage_image] =>[orig_patent_app_number] => 13076238 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/076238
METHOD AND APPARATUS FOR IMPROVED WAFER SINGULATION Mar 29, 2011 Abandoned
Array ( [id] => 6189019 [patent_doc_number] => 20110171770 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-14 [patent_title] => 'MANUFACTURING METHOD OF A PHOTOELECTRIC CONVERSION DEVICE' [patent_app_type] => utility [patent_app_number] => 13/073321 [patent_app_country] => US [patent_app_date] => 2011-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8334 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0171/20110171770.pdf [firstpage_image] =>[orig_patent_app_number] => 13073321 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/073321
Manufacturing method of a photoelectric conversion device Mar 27, 2011 Issued
Array ( [id] => 8625073 [patent_doc_number] => 08357567 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-22 [patent_title] => 'Manufacturing method of semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/053242 [patent_app_country] => US [patent_app_date] => 2011-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 51 [patent_no_of_words] => 17885 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13053242 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/053242
Manufacturing method of semiconductor device Mar 21, 2011 Issued
Array ( [id] => 8393780 [patent_doc_number] => 20120231621 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-13 [patent_title] => 'Manufacturing Method Of A Semiconductor Load Board' [patent_app_type] => utility [patent_app_number] => 13/043463 [patent_app_country] => US [patent_app_date] => 2011-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 2881 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13043463 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/043463
Manufacturing method of a semiconductor load board Mar 8, 2011 Issued
Array ( [id] => 7791047 [patent_doc_number] => 20120052603 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-01 [patent_title] => 'Method for detecting the under-fill void in flip chip BGA' [patent_app_type] => utility [patent_app_number] => 13/064161 [patent_app_country] => US [patent_app_date] => 2011-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3824 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20120052603.pdf [firstpage_image] =>[orig_patent_app_number] => 13064161 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/064161
Method for detecting the under-fill void in flip chip BGA Mar 8, 2011 Issued
Array ( [id] => 7711277 [patent_doc_number] => 20120003826 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-05 [patent_title] => 'METHODS AND COMPOSITIONS FOR DOPING SILICON SUBSTRATES WITH MOLECULAR MONOLAYERS' [patent_app_type] => utility [patent_app_number] => 13/042541 [patent_app_country] => US [patent_app_date] => 2011-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3213 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13042541 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/042541
Methods and compositions for doping silicon substrates with molecular monolayers Mar 7, 2011 Issued
Array ( [id] => 7773914 [patent_doc_number] => 08119483 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-21 [patent_title] => 'Methods of forming memory cells' [patent_app_type] => utility [patent_app_number] => 13/039600 [patent_app_country] => US [patent_app_date] => 2011-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 5425 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/119/08119483.pdf [firstpage_image] =>[orig_patent_app_number] => 13039600 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/039600
Methods of forming memory cells Mar 2, 2011 Issued
Array ( [id] => 6083749 [patent_doc_number] => 20110215421 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-08 [patent_title] => 'METHOD OF FABRICATING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/038663 [patent_app_country] => US [patent_app_date] => 2011-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 5333 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0215/20110215421.pdf [firstpage_image] =>[orig_patent_app_number] => 13038663 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/038663
Method of fabricating semiconductor device Mar 1, 2011 Issued
Array ( [id] => 5932309 [patent_doc_number] => 20110210371 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-01 [patent_title] => 'COMPOSITION FOR THERMOSETTING SILICONE RESIN' [patent_app_type] => utility [patent_app_number] => 13/037510 [patent_app_country] => US [patent_app_date] => 2011-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7756 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0210/20110210371.pdf [firstpage_image] =>[orig_patent_app_number] => 13037510 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/037510
Composition for thermosetting silcone resin Feb 28, 2011 Issued
Array ( [id] => 9440785 [patent_doc_number] => 08709895 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-29 [patent_title] => 'Manufacturing method power semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/038346 [patent_app_country] => US [patent_app_date] => 2011-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 6558 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 296 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13038346 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/038346
Manufacturing method power semiconductor device Feb 28, 2011 Issued
Array ( [id] => 6143621 [patent_doc_number] => 20110129973 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-02 [patent_title] => 'NONVOLATILE MEMORY DEVICE USING SEMICONDUCTOR NANOCRYSTALS AND METHOD OF FORMING SAME' [patent_app_type] => utility [patent_app_number] => 13/025018 [patent_app_country] => US [patent_app_date] => 2011-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7263 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0129/20110129973.pdf [firstpage_image] =>[orig_patent_app_number] => 13025018 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/025018
Nonvolatile memory device using semiconductor nanocrystals and method of forming same Feb 9, 2011 Issued
Array ( [id] => 8233182 [patent_doc_number] => 08198629 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-12 [patent_title] => 'Photoelectric conversion device and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 13/023601 [patent_app_country] => US [patent_app_date] => 2011-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 31 [patent_no_of_words] => 21022 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/198/08198629.pdf [firstpage_image] =>[orig_patent_app_number] => 13023601 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/023601
Photoelectric conversion device and method for manufacturing the same Feb 8, 2011 Issued
Array ( [id] => 6143600 [patent_doc_number] => 20110129964 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-02 [patent_title] => 'STRUCTURE COMBINING AN IC INTEGRATED SUBSTRATE AND A CARRIER, AND METHOD OF MANUFACTURING SUCH STRUCTURE' [patent_app_type] => utility [patent_app_number] => 13/018451 [patent_app_country] => US [patent_app_date] => 2011-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4423 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0129/20110129964.pdf [firstpage_image] =>[orig_patent_app_number] => 13018451 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/018451
Structure combining an IC integrated substrate and a carrier, and method of manufacturing such structure Jan 31, 2011 Issued
Array ( [id] => 6177669 [patent_doc_number] => 20110121392 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-26 [patent_title] => 'PROCESSES AND APPARATUS HAVING A SEMICONDUCTOR FIN' [patent_app_type] => utility [patent_app_number] => 13/017854 [patent_app_country] => US [patent_app_date] => 2011-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5224 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0121/20110121392.pdf [firstpage_image] =>[orig_patent_app_number] => 13017854 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/017854
Processes and apparatus having a semiconductor fin Jan 30, 2011 Issued
Array ( [id] => 5944244 [patent_doc_number] => 20110104864 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-05 [patent_title] => 'METHOD OF FABRICATING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/985309 [patent_app_country] => US [patent_app_date] => 2011-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4112 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0104/20110104864.pdf [firstpage_image] =>[orig_patent_app_number] => 12985309 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/985309
METHOD OF FABRICATING SEMICONDUCTOR DEVICE Jan 4, 2011 Abandoned
Array ( [id] => 8042441 [patent_doc_number] => 20120070951 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-22 [patent_title] => 'SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREFOR' [patent_app_type] => utility [patent_app_number] => 12/974754 [patent_app_country] => US [patent_app_date] => 2010-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 11764 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20120070951.pdf [firstpage_image] =>[orig_patent_app_number] => 12974754 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/974754
Semiconductor device and fabrication method therefor Dec 20, 2010 Issued
Array ( [id] => 6007560 [patent_doc_number] => 20110059591 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-10 [patent_title] => 'PHASE CHANGE MEMORY DEVICE HAVING DIELECTRIC LAYER FOR ISOLATING CONTACT STRUCTURE FORMED BY GROWTH, SEMICONDUCTOR DEVICE HAVING THE SAME, AND METHODS FOR MANUFACTURING THE DEVICES' [patent_app_type] => utility [patent_app_number] => 12/949275 [patent_app_country] => US [patent_app_date] => 2010-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4175 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20110059591.pdf [firstpage_image] =>[orig_patent_app_number] => 12949275 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/949275
Phase change memory device having dielectric layer for isolating contact structure formed by growth, semiconductor device having the same, and methods for manufacturing the devices Nov 17, 2010 Issued
Array ( [id] => 6007559 [patent_doc_number] => 20110059590 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-10 [patent_title] => 'METHOD FOR FORMING A REDUCED ACTIVE AREA IN A PHASE CHANGE MEMORY STRUCTURE' [patent_app_type] => utility [patent_app_number] => 12/945860 [patent_app_country] => US [patent_app_date] => 2010-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2513 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20110059590.pdf [firstpage_image] =>[orig_patent_app_number] => 12945860 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/945860
Method for forming a reduced active area in a phase change memory structure Nov 13, 2010 Issued
Array ( [id] => 9166600 [patent_doc_number] => 08592277 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-26 [patent_title] => 'Method of forming low resistance gate for power MOSFET applications' [patent_app_type] => utility [patent_app_number] => 12/891147 [patent_app_country] => US [patent_app_date] => 2010-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 33 [patent_no_of_words] => 8953 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12891147 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/891147
Method of forming low resistance gate for power MOSFET applications Sep 26, 2010 Issued
Array ( [id] => 9166600 [patent_doc_number] => 08592277 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-26 [patent_title] => 'Method of forming low resistance gate for power MOSFET applications' [patent_app_type] => utility [patent_app_number] => 12/891147 [patent_app_country] => US [patent_app_date] => 2010-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 33 [patent_no_of_words] => 8953 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12891147 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/891147
Method of forming low resistance gate for power MOSFET applications Sep 26, 2010 Issued
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