Search

Tony Michael Argenbright

Examiner (ID: 16234)

Most Active Art Unit
3402
Art Unit(s)
3747, 3402
Total Applications
2731
Issued Applications
2589
Pending Applications
40
Abandoned Applications
102

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17818372 [patent_doc_number] => 11423993 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-23 [patent_title] => Bi-directional sensing in a memory [patent_app_type] => utility [patent_app_number] => 16/676023 [patent_app_country] => US [patent_app_date] => 2019-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8622 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16676023 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/676023
Bi-directional sensing in a memory Nov 5, 2019 Issued
Array ( [id] => 15563819 [patent_doc_number] => 20200066321 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-27 [patent_title] => REPROGRAMMABLE NON-VOLATILE LATCH [patent_app_type] => utility [patent_app_number] => 16/675021 [patent_app_country] => US [patent_app_date] => 2019-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15933 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16675021 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/675021
Reprogrammable non-volatile ferroelectric latch for use with a memory controller Nov 4, 2019 Issued
Array ( [id] => 16574188 [patent_doc_number] => 10896111 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-19 [patent_title] => Data handling circuitry performing memory data handling function and test circuitry performing test operation during execution of memory data processing [patent_app_type] => utility [patent_app_number] => 16/670063 [patent_app_country] => US [patent_app_date] => 2019-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 9566 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16670063 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/670063
Data handling circuitry performing memory data handling function and test circuitry performing test operation during execution of memory data processing Oct 30, 2019 Issued
Array ( [id] => 15563877 [patent_doc_number] => 20200066350 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-27 [patent_title] => CONFIGURATION OF A MEMORY DEVICE FOR PROGRAMMING MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 16/655826 [patent_app_country] => US [patent_app_date] => 2019-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8443 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 315 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16655826 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/655826
Configuration of a memory device for programming memory cells Oct 16, 2019 Issued
Array ( [id] => 16723911 [patent_doc_number] => 20210091058 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-25 [patent_title] => TSV CHECK CIRCUIT WITH REPLICA PATH [patent_app_type] => utility [patent_app_number] => 16/576647 [patent_app_country] => US [patent_app_date] => 2019-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3741 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16576647 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/576647
TSV check circuit with replica path Sep 18, 2019 Issued
Array ( [id] => 16691868 [patent_doc_number] => 20210074347 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-11 [patent_title] => RAM CELL PROCESSING CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/568079 [patent_app_country] => US [patent_app_date] => 2019-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20480 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16568079 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/568079
RAM cell processing circuit for concurrency of refresh and read Sep 10, 2019 Issued
Array ( [id] => 16216634 [patent_doc_number] => 10732438 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-04 [patent_title] => Display devices corresponding to the shape of a non-square or non-rectangular effective display area and a driving method thereof [patent_app_type] => utility [patent_app_number] => 16/543972 [patent_app_country] => US [patent_app_date] => 2019-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 7901 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16543972 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/543972
Display devices corresponding to the shape of a non-square or non-rectangular effective display area and a driving method thereof Aug 18, 2019 Issued
Array ( [id] => 16216634 [patent_doc_number] => 10732438 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-04 [patent_title] => Display devices corresponding to the shape of a non-square or non-rectangular effective display area and a driving method thereof [patent_app_type] => utility [patent_app_number] => 16/543972 [patent_app_country] => US [patent_app_date] => 2019-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 7901 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16543972 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/543972
Display devices corresponding to the shape of a non-square or non-rectangular effective display area and a driving method thereof Aug 18, 2019 Issued
Array ( [id] => 16216634 [patent_doc_number] => 10732438 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-04 [patent_title] => Display devices corresponding to the shape of a non-square or non-rectangular effective display area and a driving method thereof [patent_app_type] => utility [patent_app_number] => 16/543972 [patent_app_country] => US [patent_app_date] => 2019-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 7901 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16543972 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/543972
Display devices corresponding to the shape of a non-square or non-rectangular effective display area and a driving method thereof Aug 18, 2019 Issued
Array ( [id] => 16216634 [patent_doc_number] => 10732438 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-04 [patent_title] => Display devices corresponding to the shape of a non-square or non-rectangular effective display area and a driving method thereof [patent_app_type] => utility [patent_app_number] => 16/543972 [patent_app_country] => US [patent_app_date] => 2019-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 7901 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16543972 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/543972
Display devices corresponding to the shape of a non-square or non-rectangular effective display area and a driving method thereof Aug 18, 2019 Issued
Array ( [id] => 17410012 [patent_doc_number] => 11250908 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-15 [patent_title] => Segmented reference trimming for memory arrays [patent_app_type] => utility [patent_app_number] => 16/544309 [patent_app_country] => US [patent_app_date] => 2019-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4005 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16544309 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/544309
Segmented reference trimming for memory arrays Aug 18, 2019 Issued
Array ( [id] => 16616989 [patent_doc_number] => 20210035642 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-04 [patent_title] => ERASE CYCLE HEALING USING A HIGH VOLTAGE PULSE [patent_app_type] => utility [patent_app_number] => 16/528291 [patent_app_country] => US [patent_app_date] => 2019-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9377 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16528291 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/528291
Erase cycle healing using a high voltage pulse Jul 30, 2019 Issued
Array ( [id] => 15118213 [patent_doc_number] => 20190345739 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-14 [patent_title] => ELECTRO-MECHANICAL LATCHING/LOCKING WITH INTEGRATED TOUCH/PUSH ACTIVATION [patent_app_type] => utility [patent_app_number] => 16/525021 [patent_app_country] => US [patent_app_date] => 2019-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10992 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16525021 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/525021
Electro-mechanical latching/locking with integrated touch/push activation Jul 28, 2019 Issued
Array ( [id] => 16000391 [patent_doc_number] => 20200176066 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-04 [patent_title] => MEMORY CONTROLLER AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 16/518313 [patent_app_country] => US [patent_app_date] => 2019-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22314 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16518313 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/518313
Memory controller and method of operating the same for processing the failed read operation Jul 21, 2019 Issued
Array ( [id] => 16585833 [patent_doc_number] => 20210020235 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-21 [patent_title] => Leakage Current Compensation in Crossbar Array [patent_app_type] => utility [patent_app_number] => 16/517485 [patent_app_country] => US [patent_app_date] => 2019-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11122 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16517485 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/517485
Leakage current compensation in crossbar array Jul 18, 2019 Issued
Array ( [id] => 16585818 [patent_doc_number] => 20210020220 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-21 [patent_title] => FERROELECTRIC MEMORY CELL ACCESS [patent_app_type] => utility [patent_app_number] => 16/511423 [patent_app_country] => US [patent_app_date] => 2019-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24627 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16511423 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/511423
Ferroelectric memory cell access Jul 14, 2019 Issued
Array ( [id] => 16578420 [patent_doc_number] => 20210012821 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-14 [patent_title] => REFERENCE GENERATION FOR VOLTAGE SENSING IN A RESISTIVE MEMORY [patent_app_type] => utility [patent_app_number] => 16/507691 [patent_app_country] => US [patent_app_date] => 2019-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5950 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16507691 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/507691
Reference generation for voltage sensing in a resistive memory Jul 9, 2019 Issued
Array ( [id] => 16560092 [patent_doc_number] => 20210005241 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-07 [patent_title] => MEMORY DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/503631 [patent_app_country] => US [patent_app_date] => 2019-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4306 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16503631 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/503631
Memory device and operating method thereof that reduce off current to reduce errors in reading and writing data which have plurality of memory cell blocks and a source voltage generator Jul 4, 2019 Issued
Array ( [id] => 16509076 [patent_doc_number] => 20200388332 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-10 [patent_title] => OVERWRITE READ METHODS FOR MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 16/502067 [patent_app_country] => US [patent_app_date] => 2019-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11216 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16502067 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/502067
OVERWRITE READ METHODS FOR MEMORY DEVICES Jul 2, 2019 Abandoned
Array ( [id] => 16789780 [patent_doc_number] => 10992223 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-27 [patent_title] => Semiconductor device having power supply voltage circuit, charge pump, comparator, and load circuit for controlling memory device [patent_app_type] => utility [patent_app_number] => 16/456253 [patent_app_country] => US [patent_app_date] => 2019-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8026 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16456253 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/456253
Semiconductor device having power supply voltage circuit, charge pump, comparator, and load circuit for controlling memory device Jun 27, 2019 Issued
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