Search

Tony Tran

Examiner (ID: 13756, Phone: (571)270-1749 , Office: P/2894 )

Most Active Art Unit
2894
Art Unit(s)
2818, 2894, 2809, 2821, 2893
Total Applications
1144
Issued Applications
736
Pending Applications
102
Abandoned Applications
312

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19681428 [patent_doc_number] => 12193318 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-07 [patent_title] => Method of forming semiconductor device having carbon nanotube [patent_app_type] => utility [patent_app_number] => 17/688259 [patent_app_country] => US [patent_app_date] => 2022-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 29 [patent_no_of_words] => 7480 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17688259 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/688259
Method of forming semiconductor device having carbon nanotube Mar 6, 2022 Issued
Array ( [id] => 17871149 [patent_doc_number] => 20220293886 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/685305 [patent_app_country] => US [patent_app_date] => 2022-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19920 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17685305 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/685305
DISPLAY DEVICE Mar 1, 2022 Pending
Array ( [id] => 19936795 [patent_doc_number] => 12310015 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-20 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 17/676209 [patent_app_country] => US [patent_app_date] => 2022-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 0 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 288 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17676209 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/676209
Semiconductor memory device Feb 19, 2022 Issued
Array ( [id] => 20111155 [patent_doc_number] => 12361889 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-15 [patent_title] => Display substrate, display panel, display apparatus, and method of fabricating display substrate [patent_app_type] => utility [patent_app_number] => 17/589810 [patent_app_country] => US [patent_app_date] => 2022-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 23 [patent_no_of_words] => 13411 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 503 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17589810 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/589810
Display substrate, display panel, display apparatus, and method of fabricating display substrate Jan 30, 2022 Issued
Array ( [id] => 17582982 [patent_doc_number] => 20220139837 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-05 [patent_title] => CONTACT STRUCTURES FOR THREE-DIMENSIONAL MEMORY [patent_app_type] => utility [patent_app_number] => 17/575158 [patent_app_country] => US [patent_app_date] => 2022-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14377 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17575158 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/575158
CONTACT STRUCTURES FOR THREE-DIMENSIONAL MEMORY Jan 12, 2022 Abandoned
Array ( [id] => 17900844 [patent_doc_number] => 20220310506 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/646977 [patent_app_country] => US [patent_app_date] => 2022-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10940 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17646977 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/646977
SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME Jan 3, 2022 Pending
Array ( [id] => 18958942 [patent_doc_number] => 20240047269 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => MOLYBDENUM DEPOSITION IN FEATURES [patent_app_type] => utility [patent_app_number] => 18/258973 [patent_app_country] => US [patent_app_date] => 2022-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13127 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18258973 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/258973
MOLYBDENUM DEPOSITION IN FEATURES Jan 2, 2022 Pending
Array ( [id] => 18180623 [patent_doc_number] => 20230041352 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-09 [patent_title] => INTERCONNECT STRUCTURE AND ELECTRONIC DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 17/565807 [patent_app_country] => US [patent_app_date] => 2021-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6852 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17565807 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/565807
INTERCONNECT STRUCTURE AND ELECTRONIC DEVICE INCLUDING THE SAME Dec 29, 2021 Abandoned
Array ( [id] => 17523041 [patent_doc_number] => 20220108890 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-07 [patent_title] => METHOD FOR PREPARING A SUBSTRATE [patent_app_type] => utility [patent_app_number] => 17/552755 [patent_app_country] => US [patent_app_date] => 2021-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3589 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17552755 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/552755
Method for preparing a substrate Dec 15, 2021 Issued
Array ( [id] => 19596934 [patent_doc_number] => 12154787 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-26 [patent_title] => Methods of performing selective low resistivity Ru atomic layer deposition and interconnect formed using the same [patent_app_type] => utility [patent_app_number] => 17/544994 [patent_app_country] => US [patent_app_date] => 2021-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5541 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17544994 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/544994
Methods of performing selective low resistivity Ru atomic layer deposition and interconnect formed using the same Dec 7, 2021 Issued
Array ( [id] => 18914450 [patent_doc_number] => 11877455 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-16 [patent_title] => Method for preparing vertical memory structure with air gaps [patent_app_type] => utility [patent_app_number] => 17/538106 [patent_app_country] => US [patent_app_date] => 2021-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 8584 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 289 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17538106 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/538106
Method for preparing vertical memory structure with air gaps Nov 29, 2021 Issued
Array ( [id] => 18408940 [patent_doc_number] => 20230170293 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-01 [patent_title] => BEOL TOP VIA WIRINGS WITH DUAL DAMASCENE VIA AND SUPER VIA REDUNDANCY [patent_app_type] => utility [patent_app_number] => 17/536269 [patent_app_country] => US [patent_app_date] => 2021-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5984 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17536269 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/536269
BEOL TOP VIA WIRINGS WITH DUAL DAMASCENE VIA AND SUPER VIA REDUNDANCY Nov 28, 2021 Pending
Array ( [id] => 17463881 [patent_doc_number] => 20220077187 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-10 [patent_title] => METHOD FOR FABRICATING MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/528068 [patent_app_country] => US [patent_app_date] => 2021-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2943 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17528068 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/528068
Method for fabricating memory device Nov 15, 2021 Issued
Array ( [id] => 19378258 [patent_doc_number] => 12069855 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-20 [patent_title] => Semiconductor memory [patent_app_type] => utility [patent_app_number] => 17/524984 [patent_app_country] => US [patent_app_date] => 2021-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 40 [patent_no_of_words] => 13969 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 287 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17524984 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/524984
Semiconductor memory Nov 11, 2021 Issued
Array ( [id] => 18081227 [patent_doc_number] => 20220406839 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-22 [patent_title] => MICRO LIGHT-EMITTING DIODE DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/517781 [patent_app_country] => US [patent_app_date] => 2021-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6197 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17517781 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/517781
MICRO LIGHT-EMITTING DIODE DISPLAY DEVICE Nov 2, 2021 Abandoned
Array ( [id] => 17417075 [patent_doc_number] => 20220051979 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-17 [patent_title] => THREE-DIMENSIONAL MEMORY DEVICE WITH DIELECTRIC ISOLATED VIA STRUCTURES AND METHODS OF MAKING THE SAME [patent_app_type] => utility [patent_app_number] => 17/516588 [patent_app_country] => US [patent_app_date] => 2021-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 44402 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17516588 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/516588
Three-dimensional memory device with dielectric isolated via structures and methods of making the same Oct 31, 2021 Issued
Array ( [id] => 17477762 [patent_doc_number] => 20220085266 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-17 [patent_title] => LIGHT EMITTING DIODE PANEL AND METHOD FOR MANUFACTURING THE LIGHT EMITTING DIODE PANEL [patent_app_type] => utility [patent_app_number] => 17/515727 [patent_app_country] => US [patent_app_date] => 2021-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6225 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 270 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17515727 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/515727
Light emitting diode panel and method for manufacturing the light emitting diode panel Oct 31, 2021 Issued
Array ( [id] => 18326803 [patent_doc_number] => 20230124931 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-20 [patent_title] => CONFIGURABLE CAPACITOR [patent_app_type] => utility [patent_app_number] => 17/451596 [patent_app_country] => US [patent_app_date] => 2021-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12155 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17451596 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/451596
CONFIGURABLE CAPACITOR Oct 19, 2021 Pending
Array ( [id] => 18307904 [patent_doc_number] => 20230111804 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-13 [patent_title] => METHOD AND APPARATUS FOR ANALOG FLOATING GATE MEMORY CELL [patent_app_type] => utility [patent_app_number] => 17/498694 [patent_app_country] => US [patent_app_date] => 2021-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6425 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17498694 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/498694
METHOD AND APPARATUS FOR ANALOG FLOATING GATE MEMORY CELL Oct 10, 2021 Abandoned
Array ( [id] => 20148348 [patent_doc_number] => 12382708 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-05 [patent_title] => Vertical stacked nanosheet CMOS transistors with different work function metals [patent_app_type] => utility [patent_app_number] => 17/497173 [patent_app_country] => US [patent_app_date] => 2021-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 30 [patent_no_of_words] => 2264 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 276 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17497173 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/497173
Vertical stacked nanosheet CMOS transistors with different work function metals Oct 7, 2021 Issued
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