Search

Tri M. Hoang

Examiner (ID: 17092, Phone: (571)270-1515 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2827
Total Applications
731
Issued Applications
674
Pending Applications
0
Abandoned Applications
58

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18205205 [patent_doc_number] => 11587607 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-21 [patent_title] => Sub word line driver [patent_app_type] => utility [patent_app_number] => 17/697483 [patent_app_country] => US [patent_app_date] => 2022-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 22533 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17697483 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/697483
Sub word line driver Mar 16, 2022 Issued
Array ( [id] => 18174944 [patent_doc_number] => 11574661 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-02-07 [patent_title] => Shared command shifter systems and methods [patent_app_type] => utility [patent_app_number] => 17/501812 [patent_app_country] => US [patent_app_date] => 2021-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7717 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17501812 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/501812
Shared command shifter systems and methods Oct 13, 2021 Issued
Array ( [id] => 18073539 [patent_doc_number] => 11532376 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-20 [patent_title] => Repair analysis circuit and memory including the same [patent_app_type] => utility [patent_app_number] => 17/496537 [patent_app_country] => US [patent_app_date] => 2021-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8113 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17496537 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/496537
Repair analysis circuit and memory including the same Oct 6, 2021 Issued
Array ( [id] => 17373425 [patent_doc_number] => 20220028477 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-27 [patent_title] => REPAIR ANALYSIS CIRCUIT AND MEMORY INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 17/496561 [patent_app_country] => US [patent_app_date] => 2021-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8121 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17496561 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/496561
Repair analysis circuit and memory including the same Oct 6, 2021 Issued
Array ( [id] => 17373402 [patent_doc_number] => 20220028454 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-27 [patent_title] => RESETTING METHOD OF RESISTIVE RANDOM ACCESS MEMORY [patent_app_type] => utility [patent_app_number] => 17/495778 [patent_app_country] => US [patent_app_date] => 2021-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5292 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17495778 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/495778
Resetting method of resistive random access memory Oct 5, 2021 Issued
Array ( [id] => 18243950 [patent_doc_number] => 20230076261 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => APPARATUS INCLUDING PARALLEL PIPELINE CONTROL AND METHODS OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/466052 [patent_app_country] => US [patent_app_date] => 2021-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7660 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17466052 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/466052
Apparatus including parallel pipeline control and methods of manufacturing the same Sep 2, 2021 Issued
Array ( [id] => 17978399 [patent_doc_number] => 11495271 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-08 [patent_title] => Receiver receiving multi-level signal, memory device including the same and method of receiving data using ihe same [patent_app_type] => utility [patent_app_number] => 17/463635 [patent_app_country] => US [patent_app_date] => 2021-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 30 [patent_no_of_words] => 14389 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17463635 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/463635
Receiver receiving multi-level signal, memory device including the same and method of receiving data using ihe same Aug 31, 2021 Issued
Array ( [id] => 18219343 [patent_doc_number] => 11594289 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-28 [patent_title] => Semiconductor device, memory system and semiconductor memory device [patent_app_type] => utility [patent_app_number] => 17/409116 [patent_app_country] => US [patent_app_date] => 2021-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7115 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17409116 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/409116
Semiconductor device, memory system and semiconductor memory device Aug 22, 2021 Issued
Array ( [id] => 18205199 [patent_doc_number] => 11587601 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-02-21 [patent_title] => Apparatus and method for controlled transmitting of read pulse and write pulse in memory [patent_app_type] => utility [patent_app_number] => 17/445461 [patent_app_country] => US [patent_app_date] => 2021-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6636 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17445461 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/445461
Apparatus and method for controlled transmitting of read pulse and write pulse in memory Aug 18, 2021 Issued
Array ( [id] => 18131127 [patent_doc_number] => 11557342 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-17 [patent_title] => Multi-level cell threshold voltage operation of one-selector-one-resistor structure included in a crossbar array [patent_app_type] => utility [patent_app_number] => 17/404157 [patent_app_country] => US [patent_app_date] => 2021-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8002 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 275 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17404157 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/404157
Multi-level cell threshold voltage operation of one-selector-one-resistor structure included in a crossbar array Aug 16, 2021 Issued
Array ( [id] => 18194698 [patent_doc_number] => 20230048217 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => ACTIVATE COMMANDS FOR MEMORY PREPARATION [patent_app_type] => utility [patent_app_number] => 17/402921 [patent_app_country] => US [patent_app_date] => 2021-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14337 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17402921 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/402921
Activate commands for memory preparation Aug 15, 2021 Issued
Array ( [id] => 18016114 [patent_doc_number] => 11508417 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-22 [patent_title] => Memory cell device and method for operating a memory cell device [patent_app_type] => utility [patent_app_number] => 17/399466 [patent_app_country] => US [patent_app_date] => 2021-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8436 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17399466 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/399466
Memory cell device and method for operating a memory cell device Aug 10, 2021 Issued
Array ( [id] => 18047703 [patent_doc_number] => 11521661 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-06 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/389629 [patent_app_country] => US [patent_app_date] => 2021-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7365 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17389629 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/389629
Semiconductor device Jul 29, 2021 Issued
Array ( [id] => 17359861 [patent_doc_number] => 20220020657 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-20 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/389636 [patent_app_country] => US [patent_app_date] => 2021-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8351 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17389636 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/389636
Semiconductor device Jul 29, 2021 Issued
Array ( [id] => 17908397 [patent_doc_number] => 11462257 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-04 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/389618 [patent_app_country] => US [patent_app_date] => 2021-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 6751 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17389618 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/389618
Semiconductor device Jul 29, 2021 Issued
Array ( [id] => 17430436 [patent_doc_number] => 20220058145 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-24 [patent_title] => ADDRESSING SCHEME FOR A MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/387319 [patent_app_country] => US [patent_app_date] => 2021-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12265 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17387319 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/387319
Addressing scheme for a memory system Jul 27, 2021 Issued
Array ( [id] => 17359652 [patent_doc_number] => 20220020448 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-20 [patent_title] => METHOD FOR SETTING A REFERENCE VOLTAGE FOR READ OPERATIONS [patent_app_type] => utility [patent_app_number] => 17/387335 [patent_app_country] => US [patent_app_date] => 2021-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17385 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17387335 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/387335
Method for setting a reference voltage for read operations Jul 27, 2021 Issued
Array ( [id] => 18073524 [patent_doc_number] => 11532361 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-20 [patent_title] => Non-volatile memory device, storage device including the same, and read method thereof [patent_app_type] => utility [patent_app_number] => 17/380289 [patent_app_country] => US [patent_app_date] => 2021-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 33 [patent_no_of_words] => 11274 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17380289 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/380289
Non-volatile memory device, storage device including the same, and read method thereof Jul 19, 2021 Issued
Array ( [id] => 17173820 [patent_doc_number] => 20210327491 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => COLUMN SELECT SWIZZLE [patent_app_type] => utility [patent_app_number] => 17/361226 [patent_app_country] => US [patent_app_date] => 2021-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5158 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17361226 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/361226
Column select swizzle Jun 27, 2021 Issued
Array ( [id] => 17676401 [patent_doc_number] => 20220189568 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => MEMORY DEVICE AND METHOD OF OPERATING THE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/357488 [patent_app_country] => US [patent_app_date] => 2021-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19503 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17357488 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/357488
Memory device and method of operating the memory device Jun 23, 2021 Issued
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