Search

Tri M. Hoang

Examiner (ID: 17092, Phone: (571)270-1515 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2827
Total Applications
731
Issued Applications
674
Pending Applications
0
Abandoned Applications
58

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17536472 [patent_doc_number] => 20220115081 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-14 [patent_title] => NON-VOLATILE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/355825 [patent_app_country] => US [patent_app_date] => 2021-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14973 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17355825 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/355825
Non-volatile memory device Jun 22, 2021 Issued
Array ( [id] => 17373379 [patent_doc_number] => 20220028431 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-27 [patent_title] => SEMICONDUCTOR DEVICE AND SEMICONDUCTOR PACKAGE INCLUDING THE SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/356080 [patent_app_country] => US [patent_app_date] => 2021-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12501 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17356080 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/356080
Semiconductor device and semiconductor package including the semiconductor device Jun 22, 2021 Issued
Array ( [id] => 17847697 [patent_doc_number] => 11437081 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-06 [patent_title] => Buffer control of multiple memory banks [patent_app_type] => utility [patent_app_number] => 17/345911 [patent_app_country] => US [patent_app_date] => 2021-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10950 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17345911 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/345911
Buffer control of multiple memory banks Jun 10, 2021 Issued
Array ( [id] => 17582603 [patent_doc_number] => 20220139458 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-05 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/345195 [patent_app_country] => US [patent_app_date] => 2021-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13257 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17345195 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/345195
Semiconductor memory device Jun 10, 2021 Issued
Array ( [id] => 18205467 [patent_doc_number] => 11587872 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-21 [patent_title] => Interconnect structure for improving memory performance and/or logic performance [patent_app_type] => utility [patent_app_number] => 17/343335 [patent_app_country] => US [patent_app_date] => 2021-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 17687 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17343335 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/343335
Interconnect structure for improving memory performance and/or logic performance Jun 8, 2021 Issued
Array ( [id] => 18073513 [patent_doc_number] => 11532350 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-20 [patent_title] => Memory device including data input/output circuit [patent_app_type] => utility [patent_app_number] => 17/341720 [patent_app_country] => US [patent_app_date] => 2021-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3867 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17341720 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/341720
Memory device including data input/output circuit Jun 7, 2021 Issued
Array ( [id] => 17115984 [patent_doc_number] => 20210296581 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-23 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING VARIABLE RESISTANCE ELEMENT [patent_app_type] => utility [patent_app_number] => 17/338556 [patent_app_country] => US [patent_app_date] => 2021-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9001 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17338556 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/338556
Semiconductor device including variable resistance element Jun 2, 2021 Issued
Array ( [id] => 17617547 [patent_doc_number] => 20220159827 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => MODULE BOARD AND MEMORY MODULE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 17/337850 [patent_app_country] => US [patent_app_date] => 2021-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8716 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17337850 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/337850
Module board and memory module including the same Jun 2, 2021 Issued
Array ( [id] => 17893055 [patent_doc_number] => 11456034 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-27 [patent_title] => Fully associative cache management [patent_app_type] => utility [patent_app_number] => 17/332579 [patent_app_country] => US [patent_app_date] => 2021-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 14275 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17332579 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/332579
Fully associative cache management May 26, 2021 Issued
Array ( [id] => 17085225 [patent_doc_number] => 20210280232 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-09 [patent_title] => COPY DATA IN A MEMORY SYSTEM WITH ARTIFICIAL INTELLIGENCE MODE [patent_app_type] => utility [patent_app_number] => 17/328751 [patent_app_country] => US [patent_app_date] => 2021-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8174 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17328751 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/328751
Copy data in a memory system with artificial intelligence mode May 23, 2021 Issued
Array ( [id] => 17818375 [patent_doc_number] => 11423996 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-08-23 [patent_title] => Memory apparatus and method of operation using triple string concurrent programming during erase [patent_app_type] => utility [patent_app_number] => 17/323293 [patent_app_country] => US [patent_app_date] => 2021-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 34 [patent_no_of_words] => 17922 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17323293 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/323293
Memory apparatus and method of operation using triple string concurrent programming during erase May 17, 2021 Issued
Array ( [id] => 17787578 [patent_doc_number] => 11410712 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-09 [patent_title] => Memory system and data transmission method [patent_app_type] => utility [patent_app_number] => 17/321209 [patent_app_country] => US [patent_app_date] => 2021-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 71 [patent_figures_cnt] => 73 [patent_no_of_words] => 31022 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17321209 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/321209
Memory system and data transmission method May 13, 2021 Issued
Array ( [id] => 17485676 [patent_doc_number] => 20220093180 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-24 [patent_title] => MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/315767 [patent_app_country] => US [patent_app_date] => 2021-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15277 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17315767 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/315767
Memory device May 9, 2021 Issued
Array ( [id] => 18016138 [patent_doc_number] => 11508441 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-22 [patent_title] => Memory device and program operation thereof [patent_app_type] => utility [patent_app_number] => 17/307889 [patent_app_country] => US [patent_app_date] => 2021-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 12218 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17307889 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/307889
Memory device and program operation thereof May 3, 2021 Issued
Array ( [id] => 17847704 [patent_doc_number] => 11437088 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-06 [patent_title] => Memory device including row decoders [patent_app_type] => utility [patent_app_number] => 17/239655 [patent_app_country] => US [patent_app_date] => 2021-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 11916 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17239655 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/239655
Memory device including row decoders Apr 24, 2021 Issued
Array ( [id] => 17010665 [patent_doc_number] => 20210241826 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-05 [patent_title] => Circuit for Reducing Voltage Degradation Caused By Parasitic Resistance in a Memory Device [patent_app_type] => utility [patent_app_number] => 17/234276 [patent_app_country] => US [patent_app_date] => 2021-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9170 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17234276 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/234276
Circuit for reducing voltage degradation caused by parasitic resistance in a memory device Apr 18, 2021 Issued
Array ( [id] => 17757964 [patent_doc_number] => 11398262 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-07-26 [patent_title] => Forced current access with voltage clamping in cross-point array [patent_app_type] => utility [patent_app_number] => 17/232924 [patent_app_country] => US [patent_app_date] => 2021-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 33 [patent_no_of_words] => 21710 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17232924 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/232924
Forced current access with voltage clamping in cross-point array Apr 15, 2021 Issued
Array ( [id] => 17772468 [patent_doc_number] => 11404420 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-02 [patent_title] => Method of operating semiconductor memory device with floating body transistor using silicon controlled rectifier principle [patent_app_type] => utility [patent_app_number] => 17/232587 [patent_app_country] => US [patent_app_date] => 2021-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 7079 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17232587 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/232587
Method of operating semiconductor memory device with floating body transistor using silicon controlled rectifier principle Apr 15, 2021 Issued
Array ( [id] => 18031792 [patent_doc_number] => 11514987 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-29 [patent_title] => Erasing memory [patent_app_type] => utility [patent_app_number] => 17/228807 [patent_app_country] => US [patent_app_date] => 2021-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 12908 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17228807 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/228807
Erasing memory Apr 12, 2021 Issued
Array ( [id] => 17818609 [patent_doc_number] => 11424233 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-08-23 [patent_title] => Memory circuits and related methods [patent_app_type] => utility [patent_app_number] => 17/225913 [patent_app_country] => US [patent_app_date] => 2021-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8424 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17225913 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/225913
Memory circuits and related methods Apr 7, 2021 Issued
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