Search

Trisha U. Vu

Examiner (ID: 4980)

Most Active Art Unit
2111
Art Unit(s)
2111, 2112, 2181, 2189
Total Applications
371
Issued Applications
278
Pending Applications
4
Abandoned Applications
90

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7160087 [patent_doc_number] => 20050027918 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-03 [patent_title] => 'Automatically establishing a wireless connection between adapters' [patent_app_type] => utility [patent_app_number] => 10/689389 [patent_app_country] => US [patent_app_date] => 2003-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 13100 [patent_no_of_claims] => 59 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20050027918.pdf [firstpage_image] =>[orig_patent_app_number] => 10689389 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/689389
Automatically establishing a wireless connection between adapters Oct 19, 2003 Issued
Array ( [id] => 7167169 [patent_doc_number] => 20050086547 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-21 [patent_title] => 'Optimization of SMI handling and initialization' [patent_app_type] => utility [patent_app_number] => 10/681446 [patent_app_country] => US [patent_app_date] => 2003-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5028 [patent_no_of_claims] => 61 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0086/20050086547.pdf [firstpage_image] =>[orig_patent_app_number] => 10681446 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/681446
Optimization of SMI handling and initialization Oct 5, 2003 Issued
Array ( [id] => 7412167 [patent_doc_number] => 20040024945 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-05 [patent_title] => 'Adaptive retry mechanism' [patent_app_type] => new [patent_app_number] => 10/629097 [patent_app_country] => US [patent_app_date] => 2003-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8288 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0024/20040024945.pdf [firstpage_image] =>[orig_patent_app_number] => 10629097 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/629097
Adaptive retry mechanism Jul 28, 2003 Issued
Array ( [id] => 1066668 [patent_doc_number] => 06851009 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-02-01 [patent_title] => 'Method, system and apparatus for a computer subsystem interconnection using a chain of bus repeaters' [patent_app_type] => utility [patent_app_number] => 10/446402 [patent_app_country] => US [patent_app_date] => 2003-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 12240 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/851/06851009.pdf [firstpage_image] =>[orig_patent_app_number] => 10446402 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/446402
Method, system and apparatus for a computer subsystem interconnection using a chain of bus repeaters May 27, 2003 Issued
Array ( [id] => 7456581 [patent_doc_number] => 20040186917 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-23 [patent_title] => 'Cross-region transferring device and system' [patent_app_type] => new [patent_app_number] => 10/393021 [patent_app_country] => US [patent_app_date] => 2003-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3858 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0186/20040186917.pdf [firstpage_image] =>[orig_patent_app_number] => 10393021 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/393021
Cross-region transferring device and system Mar 20, 2003 Abandoned
Array ( [id] => 378964 [patent_doc_number] => 07313642 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-12-25 [patent_title] => 'Bus bridge arbitration method' [patent_app_type] => utility [patent_app_number] => 10/391167 [patent_app_country] => US [patent_app_date] => 2003-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7905 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 337 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/313/07313642.pdf [firstpage_image] =>[orig_patent_app_number] => 10391167 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/391167
Bus bridge arbitration method Mar 17, 2003 Issued
Array ( [id] => 7605738 [patent_doc_number] => 07099984 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-29 [patent_title] => 'Method and system for handling interrupts and other communications in the presence of multiple processing sets' [patent_app_type] => utility [patent_app_number] => 10/389443 [patent_app_country] => US [patent_app_date] => 2003-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 11244 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/099/07099984.pdf [firstpage_image] =>[orig_patent_app_number] => 10389443 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/389443
Method and system for handling interrupts and other communications in the presence of multiple processing sets Mar 13, 2003 Issued
Array ( [id] => 690579 [patent_doc_number] => 07080175 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-18 [patent_title] => 'Network system' [patent_app_type] => utility [patent_app_number] => 10/390561 [patent_app_country] => US [patent_app_date] => 2003-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 7740 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/080/07080175.pdf [firstpage_image] =>[orig_patent_app_number] => 10390561 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/390561
Network system Mar 12, 2003 Issued
Array ( [id] => 493641 [patent_doc_number] => 07219182 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-15 [patent_title] => 'Method and system for using an external bus controller in embedded disk controllers' [patent_app_type] => utility [patent_app_number] => 10/385056 [patent_app_country] => US [patent_app_date] => 2003-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 49 [patent_figures_cnt] => 67 [patent_no_of_words] => 10258 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/219/07219182.pdf [firstpage_image] =>[orig_patent_app_number] => 10385056 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/385056
Method and system for using an external bus controller in embedded disk controllers Mar 9, 2003 Issued
Array ( [id] => 629661 [patent_doc_number] => 07136904 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-11-14 [patent_title] => 'Wireless cable replacement for computer peripherals using a master adapter' [patent_app_type] => utility [patent_app_number] => 10/329101 [patent_app_country] => US [patent_app_date] => 2002-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 6469 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/136/07136904.pdf [firstpage_image] =>[orig_patent_app_number] => 10329101 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/329101
Wireless cable replacement for computer peripherals using a master adapter Dec 22, 2002 Issued
Array ( [id] => 648989 [patent_doc_number] => 07120711 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-10 [patent_title] => 'System and method for communicating over intra-hierarchy and inter-hierarchy links' [patent_app_type] => utility [patent_app_number] => 10/325807 [patent_app_country] => US [patent_app_date] => 2002-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4118 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/120/07120711.pdf [firstpage_image] =>[orig_patent_app_number] => 10325807 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/325807
System and method for communicating over intra-hierarchy and inter-hierarchy links Dec 18, 2002 Issued
Array ( [id] => 959930 [patent_doc_number] => 06954813 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-10-11 [patent_title] => 'Method, system and program product for facilitating hotplugging of multiple adapters into a system bus and transparently optimizing configuration of the system bus' [patent_app_type] => utility [patent_app_number] => 10/323475 [patent_app_country] => US [patent_app_date] => 2002-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4061 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/954/06954813.pdf [firstpage_image] =>[orig_patent_app_number] => 10323475 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/323475
Method, system and program product for facilitating hotplugging of multiple adapters into a system bus and transparently optimizing configuration of the system bus Dec 17, 2002 Issued
Array ( [id] => 7615429 [patent_doc_number] => 06948017 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-09-20 [patent_title] => 'Method and apparatus having dynamically scalable clock domains for selectively interconnecting subsystems on a synchronous bus' [patent_app_type] => utility [patent_app_number] => 10/324741 [patent_app_country] => US [patent_app_date] => 2002-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5009 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 307 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/948/06948017.pdf [firstpage_image] =>[orig_patent_app_number] => 10324741 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/324741
Method and apparatus having dynamically scalable clock domains for selectively interconnecting subsystems on a synchronous bus Dec 17, 2002 Issued
Array ( [id] => 649003 [patent_doc_number] => 07120722 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-10 [patent_title] => 'Using information provided through tag space' [patent_app_type] => utility [patent_app_number] => 10/322562 [patent_app_country] => US [patent_app_date] => 2002-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 6943 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/120/07120722.pdf [firstpage_image] =>[orig_patent_app_number] => 10322562 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/322562
Using information provided through tag space Dec 16, 2002 Issued
Array ( [id] => 671464 [patent_doc_number] => 07096291 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-22 [patent_title] => 'Method and device for arbitrating bus grant' [patent_app_type] => utility [patent_app_number] => 10/319060 [patent_app_country] => US [patent_app_date] => 2002-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2146 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/096/07096291.pdf [firstpage_image] =>[orig_patent_app_number] => 10319060 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/319060
Method and device for arbitrating bus grant Dec 12, 2002 Issued
Array ( [id] => 6670398 [patent_doc_number] => 20030115383 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-19 [patent_title] => 'System and method for managing CPCI buses in a multi-processing system' [patent_app_type] => new [patent_app_number] => 10/317134 [patent_app_country] => US [patent_app_date] => 2002-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6149 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0115/20030115383.pdf [firstpage_image] =>[orig_patent_app_number] => 10317134 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/317134
System and method for managing CPCI buses in a multi-processing system Dec 11, 2002 Issued
Array ( [id] => 6855201 [patent_doc_number] => 20030128702 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-10 [patent_title] => 'Communication method and apparatus for assigning device identifier' [patent_app_type] => new [patent_app_number] => 10/314809 [patent_app_country] => US [patent_app_date] => 2002-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 13692 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20030128702.pdf [firstpage_image] =>[orig_patent_app_number] => 10314809 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/314809
Communication method and apparatus for assigning device identifier Dec 8, 2002 Abandoned
Array ( [id] => 6661079 [patent_doc_number] => 20030135723 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-17 [patent_title] => 'Method and device for processing interrupt signals' [patent_app_type] => new [patent_app_number] => 10/313389 [patent_app_country] => US [patent_app_date] => 2002-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1637 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0135/20030135723.pdf [firstpage_image] =>[orig_patent_app_number] => 10313389 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/313389
Method and device for processing interrupt signals Dec 5, 2002 Abandoned
Array ( [id] => 725859 [patent_doc_number] => 07051135 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-23 [patent_title] => 'Hierarchical bus arbitration' [patent_app_type] => utility [patent_app_number] => 10/302723 [patent_app_country] => US [patent_app_date] => 2002-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 6598 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/051/07051135.pdf [firstpage_image] =>[orig_patent_app_number] => 10302723 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/302723
Hierarchical bus arbitration Nov 21, 2002 Issued
Array ( [id] => 7474245 [patent_doc_number] => 20040103234 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-27 [patent_title] => 'Combination non-volatile memory and input-output card with direct memory access' [patent_app_type] => new [patent_app_number] => 10/302009 [patent_app_country] => US [patent_app_date] => 2002-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6367 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0103/20040103234.pdf [firstpage_image] =>[orig_patent_app_number] => 10302009 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/302009
Combination non-volatile memory and input-output card with direct memory access Nov 20, 2002 Issued
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