Search

Trisha U. Vu

Examiner (ID: 4980)

Most Active Art Unit
2111
Art Unit(s)
2111, 2112, 2181, 2189
Total Applications
371
Issued Applications
278
Pending Applications
4
Abandoned Applications
90

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6775521 [patent_doc_number] => 20030018859 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-23 [patent_title] => 'Arbitration in local system for access to memory in a distant subsystem' [patent_app_type] => new [patent_app_number] => 10/077228 [patent_app_country] => US [patent_app_date] => 2002-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4306 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20030018859.pdf [firstpage_image] =>[orig_patent_app_number] => 10077228 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/077228
Arbitration in local system for access to memory in a distant subsystem Feb 14, 2002 Issued
Array ( [id] => 1119956 [patent_doc_number] => 06801972 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-10-05 [patent_title] => 'Interface shutdown mode for a data bus slave' [patent_app_type] => B2 [patent_app_number] => 10/077453 [patent_app_country] => US [patent_app_date] => 2002-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4166 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/801/06801972.pdf [firstpage_image] =>[orig_patent_app_number] => 10077453 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/077453
Interface shutdown mode for a data bus slave Feb 14, 2002 Issued
Array ( [id] => 6844476 [patent_doc_number] => 20030149823 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-07 [patent_title] => 'System and method for providing context information' [patent_app_type] => new [patent_app_number] => 10/052585 [patent_app_country] => US [patent_app_date] => 2002-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6018 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0149/20030149823.pdf [firstpage_image] =>[orig_patent_app_number] => 10052585 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/052585
System and method for providing context information Jan 22, 2002 Issued
Array ( [id] => 6661032 [patent_doc_number] => 20030135676 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-17 [patent_title] => 'Low-power bus interface' [patent_app_type] => new [patent_app_number] => 10/052277 [patent_app_country] => US [patent_app_date] => 2002-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3304 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0135/20030135676.pdf [firstpage_image] =>[orig_patent_app_number] => 10052277 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/052277
Low-power bus interface Jan 16, 2002 Abandoned
Array ( [id] => 6661035 [patent_doc_number] => 20030135679 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-17 [patent_title] => 'Circuit and method for expanding a serial bus' [patent_app_type] => new [patent_app_number] => 10/051478 [patent_app_country] => US [patent_app_date] => 2002-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3753 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0135/20030135679.pdf [firstpage_image] =>[orig_patent_app_number] => 10051478 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/051478
Circuit and method for expanding a serial bus Jan 15, 2002 Issued
Array ( [id] => 6857672 [patent_doc_number] => 20030131173 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-10 [patent_title] => 'Method and apparatus for host messaging unit for peripheral component interconnect busmaster devices' [patent_app_type] => new [patent_app_number] => 10/042809 [patent_app_country] => US [patent_app_date] => 2002-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7658 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0131/20030131173.pdf [firstpage_image] =>[orig_patent_app_number] => 10042809 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/042809
Method and apparatus for host messaging unit for Peripheral Component Interconnect busmaster devices Jan 8, 2002 Issued
Array ( [id] => 6762985 [patent_doc_number] => 20030126347 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-03 [patent_title] => 'Data array having redundancy messaging between array controllers over the host bus' [patent_app_type] => new [patent_app_number] => 10/034138 [patent_app_country] => US [patent_app_date] => 2001-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5302 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0126/20030126347.pdf [firstpage_image] =>[orig_patent_app_number] => 10034138 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/034138
Data array having redundancy messaging between array controllers over the host bus Dec 26, 2001 Issued
Array ( [id] => 6862502 [patent_doc_number] => 20030093510 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-15 [patent_title] => 'Method and apparatus for enumeration of a multi-node computer system' [patent_app_type] => new [patent_app_number] => 09/992725 [patent_app_country] => US [patent_app_date] => 2001-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5797 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0093/20030093510.pdf [firstpage_image] =>[orig_patent_app_number] => 09992725 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/992725
Method and apparatus for enumeration of a multi-node computer system Nov 13, 2001 Abandoned
Array ( [id] => 933301 [patent_doc_number] => 06981086 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-27 [patent_title] => 'Instrumentation system including a backplane having a switched fabric bus and instrumentation lines' [patent_app_type] => utility [patent_app_number] => 10/014638 [patent_app_country] => US [patent_app_date] => 2001-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6863 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/981/06981086.pdf [firstpage_image] =>[orig_patent_app_number] => 10014638 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/014638
Instrumentation system including a backplane having a switched fabric bus and instrumentation lines Oct 25, 2001 Issued
Array ( [id] => 792639 [patent_doc_number] => 06985987 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-10 [patent_title] => 'Apparatus and method for supporting multi-processors and motherboard of the same' [patent_app_type] => utility [patent_app_number] => 10/036168 [patent_app_country] => US [patent_app_date] => 2001-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3250 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/985/06985987.pdf [firstpage_image] =>[orig_patent_app_number] => 10036168 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/036168
Apparatus and method for supporting multi-processors and motherboard of the same Oct 21, 2001 Issued
Array ( [id] => 6814956 [patent_doc_number] => 20030074506 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-17 [patent_title] => 'Extending processors from two-way to four-way configuration' [patent_app_type] => new [patent_app_number] => 09/978512 [patent_app_country] => US [patent_app_date] => 2001-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3729 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0074/20030074506.pdf [firstpage_image] =>[orig_patent_app_number] => 09978512 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/978512
Extending processors from two-way to four-way configuration Oct 15, 2001 Abandoned
Array ( [id] => 1027630 [patent_doc_number] => 06886066 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-26 [patent_title] => 'Method and apparatus for sharing signal pins on an interface between a system controller and peripheral integrated circuits' [patent_app_type] => utility [patent_app_number] => 09/975202 [patent_app_country] => US [patent_app_date] => 2001-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2041 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/886/06886066.pdf [firstpage_image] =>[orig_patent_app_number] => 09975202 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/975202
Method and apparatus for sharing signal pins on an interface between a system controller and peripheral integrated circuits Oct 10, 2001 Issued
Array ( [id] => 6784304 [patent_doc_number] => 20030065752 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-03 [patent_title] => 'Apparatus and method for enumeration of processors during hot-plug of a compute node' [patent_app_type] => new [patent_app_number] => 09/971211 [patent_app_country] => US [patent_app_date] => 2001-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 8675 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0065/20030065752.pdf [firstpage_image] =>[orig_patent_app_number] => 09971211 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/971211
Apparatus and method for enumeration of processors during hot-plug of a compute node Oct 2, 2001 Issued
Array ( [id] => 953244 [patent_doc_number] => 06961800 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-01 [patent_title] => 'Method for improving processor performance' [patent_app_type] => utility [patent_app_number] => 09/967155 [patent_app_country] => US [patent_app_date] => 2001-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4025 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/961/06961800.pdf [firstpage_image] =>[orig_patent_app_number] => 09967155 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/967155
Method for improving processor performance Sep 27, 2001 Issued
Array ( [id] => 6784401 [patent_doc_number] => 20030065849 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-03 [patent_title] => 'Bus arbitration system and method for carrying out a centralized arbitration with independent bus request and grant lines' [patent_app_type] => new [patent_app_number] => 09/968097 [patent_app_country] => US [patent_app_date] => 2001-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2867 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0065/20030065849.pdf [firstpage_image] =>[orig_patent_app_number] => 09968097 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/968097
Bus arbitration system and method for carrying out a centralized arbitration with independent bus request and grant lines Sep 27, 2001 Issued
Array ( [id] => 7625722 [patent_doc_number] => 06769045 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-27 [patent_title] => 'PCI expansion adapter with PC card slot and electronic apparatus provided with the same' [patent_app_type] => B2 [patent_app_number] => 09/949823 [patent_app_country] => US [patent_app_date] => 2001-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 6134 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 11 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/769/06769045.pdf [firstpage_image] =>[orig_patent_app_number] => 09949823 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/949823
PCI expansion adapter with PC card slot and electronic apparatus provided with the same Sep 11, 2001 Issued
Array ( [id] => 1097288 [patent_doc_number] => 06826643 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-30 [patent_title] => 'Method of synchronizing arbiters within a hierarchical computer system' [patent_app_type] => B2 [patent_app_number] => 09/947853 [patent_app_country] => US [patent_app_date] => 2001-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 6302 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/826/06826643.pdf [firstpage_image] =>[orig_patent_app_number] => 09947853 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/947853
Method of synchronizing arbiters within a hierarchical computer system Sep 5, 2001 Issued
Array ( [id] => 6283137 [patent_doc_number] => 20020108008 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-08 [patent_title] => 'Computer system having improved interface' [patent_app_type] => new [patent_app_number] => 09/945655 [patent_app_country] => US [patent_app_date] => 2001-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3962 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0108/20020108008.pdf [firstpage_image] =>[orig_patent_app_number] => 09945655 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/945655
Computer system having improved interface Sep 4, 2001 Issued
Array ( [id] => 6509306 [patent_doc_number] => 20020191601 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-19 [patent_title] => 'On-chip communication architecture and method' [patent_app_type] => new [patent_app_number] => 09/946097 [patent_app_country] => US [patent_app_date] => 2001-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7227 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0191/20020191601.pdf [firstpage_image] =>[orig_patent_app_number] => 09946097 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/946097
On-chip communication architecture and method Sep 3, 2001 Abandoned
Array ( [id] => 825523 [patent_doc_number] => 07406554 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-07-29 [patent_title] => 'Queue circuit and method for memory arbitration employing same' [patent_app_type] => utility [patent_app_number] => 09/909704 [patent_app_country] => US [patent_app_date] => 2001-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 4755 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/406/07406554.pdf [firstpage_image] =>[orig_patent_app_number] => 09909704 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/909704
Queue circuit and method for memory arbitration employing same Jul 19, 2001 Issued
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