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Trisha U. Vu

Examiner (ID: 9280)

Most Active Art Unit
2111
Art Unit(s)
2181, 2189, 2111, 2112
Total Applications
371
Issued Applications
278
Pending Applications
4
Abandoned Applications
90

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1409177 [patent_doc_number] => 06557067 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-29 [patent_title] => 'System and method to effectively compensate for delays in an electronic interconnect' [patent_app_type] => B1 [patent_app_number] => 09/497322 [patent_app_country] => US [patent_app_date] => 2000-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4905 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/557/06557067.pdf [firstpage_image] =>[orig_patent_app_number] => 09497322 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/497322
System and method to effectively compensate for delays in an electronic interconnect Feb 2, 2000 Issued
Array ( [id] => 1308532 [patent_doc_number] => 06629177 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-30 [patent_title] => 'Arbitrating requests on computer buses' [patent_app_type] => B1 [patent_app_number] => 09/472052 [patent_app_country] => US [patent_app_date] => 1999-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 1822 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/629/06629177.pdf [firstpage_image] =>[orig_patent_app_number] => 09472052 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/472052
Arbitrating requests on computer buses Dec 26, 1999 Issued
Array ( [id] => 1347606 [patent_doc_number] => 06598106 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-22 [patent_title] => 'Dual-port SCSI sub-system with fail-over capabilities' [patent_app_type] => B1 [patent_app_number] => 09/471642 [patent_app_country] => US [patent_app_date] => 1999-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7089 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/598/06598106.pdf [firstpage_image] =>[orig_patent_app_number] => 09471642 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/471642
Dual-port SCSI sub-system with fail-over capabilities Dec 22, 1999 Issued
Array ( [id] => 771269 [patent_doc_number] => 07010634 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-03-07 [patent_title] => 'Notebook computer with independently functional, dockable core computer' [patent_app_type] => utility [patent_app_number] => 09/470669 [patent_app_country] => US [patent_app_date] => 1999-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2487 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/010/07010634.pdf [firstpage_image] =>[orig_patent_app_number] => 09470669 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/470669
Notebook computer with independently functional, dockable core computer Dec 22, 1999 Issued
Array ( [id] => 7628202 [patent_doc_number] => 06820158 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-11-16 [patent_title] => 'Method and apparatus for a configuration ring' [patent_app_type] => B1 [patent_app_number] => 09/385978 [patent_app_country] => US [patent_app_date] => 1999-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 21 [patent_no_of_words] => 6679 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 4 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/820/06820158.pdf [firstpage_image] =>[orig_patent_app_number] => 09385978 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/385978
Method and apparatus for a configuration ring Aug 29, 1999 Issued
Array ( [id] => 1365081 [patent_doc_number] => 06581126 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-17 [patent_title] => 'Method, system and apparatus for a computer subsystem interconnection using a chain of bus repeaters' [patent_app_type] => B1 [patent_app_number] => 09/315412 [patent_app_country] => US [patent_app_date] => 1999-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 12237 [patent_no_of_claims] => 69 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/581/06581126.pdf [firstpage_image] =>[orig_patent_app_number] => 09315412 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/315412
Method, system and apparatus for a computer subsystem interconnection using a chain of bus repeaters May 18, 1999 Issued
Array ( [id] => 1186639 [patent_doc_number] => 06738846 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-05-18 [patent_title] => 'Cooperative processing of tasks in a multi-threaded computing system' [patent_app_type] => B1 [patent_app_number] => 09/255935 [patent_app_country] => US [patent_app_date] => 1999-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 6435 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/738/06738846.pdf [firstpage_image] =>[orig_patent_app_number] => 09255935 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/255935
Cooperative processing of tasks in a multi-threaded computing system Feb 22, 1999 Issued
Array ( [id] => 877392 [patent_doc_number] => 07363401 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-04-22 [patent_title] => 'Method and apparatus for controlling bus transactions depending on bus clock frequency' [patent_app_type] => utility [patent_app_number] => 08/990420 [patent_app_country] => US [patent_app_date] => 1997-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 3648 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/363/07363401.pdf [firstpage_image] =>[orig_patent_app_number] => 08990420 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/990420
Method and apparatus for controlling bus transactions depending on bus clock frequency Dec 14, 1997 Issued
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