Search

Trong Q. Phan

Examiner (ID: 8660, Phone: (571)272-1794 , Office: P/2825 )

Most Active Art Unit
2818
Art Unit(s)
2504, 2827, 2818, 2511, 2824, 2825, 2899
Total Applications
3077
Issued Applications
2717
Pending Applications
50
Abandoned Applications
311

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8191908 [patent_doc_number] => 08184481 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-22 [patent_title] => 'Memory devices and methods of their operation including selective compaction verify operations' [patent_app_type] => utility [patent_app_number] => 13/084108 [patent_app_country] => US [patent_app_date] => 2011-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5322 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/184/08184481.pdf [firstpage_image] =>[orig_patent_app_number] => 13084108 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/084108
Memory devices and methods of their operation including selective compaction verify operations Apr 10, 2011 Issued
Array ( [id] => 6172829 [patent_doc_number] => 20110176376 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-21 [patent_title] => 'LOW POWER SYNCHRONOUS MEMORY COMMAND ADDRESS SCHEME' [patent_app_type] => utility [patent_app_number] => 13/073991 [patent_app_country] => US [patent_app_date] => 2011-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1430 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0176/20110176376.pdf [firstpage_image] =>[orig_patent_app_number] => 13073991 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/073991
LOW POWER SYNCHRONOUS MEMORY COMMAND ADDRESS SCHEME Mar 27, 2011 Abandoned
Array ( [id] => 7765472 [patent_doc_number] => 08116137 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-14 [patent_title] => 'Memory cell operation' [patent_app_type] => utility [patent_app_number] => 13/049464 [patent_app_country] => US [patent_app_date] => 2011-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 14509 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/116/08116137.pdf [firstpage_image] =>[orig_patent_app_number] => 13049464 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/049464
Memory cell operation Mar 15, 2011 Issued
Array ( [id] => 8654273 [patent_doc_number] => 08374029 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-12 [patent_title] => 'Electrically addressed non-volatile memory maintentance' [patent_app_type] => utility [patent_app_number] => 13/047798 [patent_app_country] => US [patent_app_date] => 2011-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4769 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13047798 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/047798
Electrically addressed non-volatile memory maintentance Mar 14, 2011 Issued
Array ( [id] => 7698002 [patent_doc_number] => 20110228588 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-22 [patent_title] => 'NONVOLATILE MEMORY DEVICE AND METHOD OF PROGRAMMING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/048120 [patent_app_country] => US [patent_app_date] => 2011-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7085 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0228/20110228588.pdf [firstpage_image] =>[orig_patent_app_number] => 13048120 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/048120
Nonvolatile memory device and method of programming the same Mar 14, 2011 Issued
Array ( [id] => 8859991 [patent_doc_number] => 08462536 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-11 [patent_title] => 'Method and apparatus for addressing memory arrays' [patent_app_type] => utility [patent_app_number] => 13/046248 [patent_app_country] => US [patent_app_date] => 2011-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4176 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13046248 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/046248
Method and apparatus for addressing memory arrays Mar 10, 2011 Issued
Array ( [id] => 6044851 [patent_doc_number] => 20110205820 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-25 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/929896 [patent_app_country] => US [patent_app_date] => 2011-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 11703 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0205/20110205820.pdf [firstpage_image] =>[orig_patent_app_number] => 12929896 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/929896
Semiconductor device Feb 22, 2011 Issued
Array ( [id] => 6060599 [patent_doc_number] => 20110199805 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-18 [patent_title] => 'Selective access memory circuit' [patent_app_type] => utility [patent_app_number] => 12/932040 [patent_app_country] => US [patent_app_date] => 2011-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 11872 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0199/20110199805.pdf [firstpage_image] =>[orig_patent_app_number] => 12932040 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/932040
Selective access memory circuit Feb 15, 2011 Issued
Array ( [id] => 6086604 [patent_doc_number] => 20110216584 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-08 [patent_title] => 'Electromechanical switch, storage device comprising such an electromechanical switch and method for operating the same' [patent_app_type] => utility [patent_app_number] => 12/931812 [patent_app_country] => US [patent_app_date] => 2011-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3247 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0216/20110216584.pdf [firstpage_image] =>[orig_patent_app_number] => 12931812 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/931812
Electromechanical switch, storage device comprising such an electromechanical switch and method for operating the same Feb 10, 2011 Issued
Array ( [id] => 6140558 [patent_doc_number] => 20110128803 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-02 [patent_title] => 'CORE VOLTAGE DISCHARGER AND SEMICONDUCTOR MEMORY DEVICE WITH THE SAME' [patent_app_type] => utility [patent_app_number] => 13/023739 [patent_app_country] => US [patent_app_date] => 2011-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3929 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20110128803.pdf [firstpage_image] =>[orig_patent_app_number] => 13023739 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/023739
Core voltage discharger and semiconductor memory device with the same Feb 8, 2011 Issued
Array ( [id] => 6140495 [patent_doc_number] => 20110128780 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-02 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/024252 [patent_app_country] => US [patent_app_date] => 2011-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 10589 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20110128780.pdf [firstpage_image] =>[orig_patent_app_number] => 13024252 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/024252
Semiconductor device Feb 8, 2011 Issued
Array ( [id] => 8714661 [patent_doc_number] => 08400805 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-19 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/929668 [patent_app_country] => US [patent_app_date] => 2011-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 14821 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12929668 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/929668
Semiconductor device Feb 6, 2011 Issued
Array ( [id] => 8773901 [patent_doc_number] => 08427868 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-23 [patent_title] => 'Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memory' [patent_app_type] => utility [patent_app_number] => 12/931438 [patent_app_country] => US [patent_app_date] => 2011-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7190 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12931438 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/931438
Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memory Jan 31, 2011 Issued
Array ( [id] => 8539370 [patent_doc_number] => 08315092 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-20 [patent_title] => 'Apparatus, system, and method for determining a read voltage threshold for solid-state storage media' [patent_app_type] => utility [patent_app_number] => 13/015458 [patent_app_country] => US [patent_app_date] => 2011-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 43063 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13015458 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/015458
Apparatus, system, and method for determining a read voltage threshold for solid-state storage media Jan 26, 2011 Issued
Array ( [id] => 6086645 [patent_doc_number] => 20110216616 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-08 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/014522 [patent_app_country] => US [patent_app_date] => 2011-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5916 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0216/20110216616.pdf [firstpage_image] =>[orig_patent_app_number] => 13014522 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/014522
SEMICONDUCTOR MEMORY DEVICE Jan 25, 2011 Abandoned
Array ( [id] => 6108555 [patent_doc_number] => 20110188309 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-04 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/014212 [patent_app_country] => US [patent_app_date] => 2011-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 18407 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0188/20110188309.pdf [firstpage_image] =>[orig_patent_app_number] => 13014212 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/014212
Semiconductor device Jan 25, 2011 Issued
Array ( [id] => 6180941 [patent_doc_number] => 20110122677 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-26 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/014360 [patent_app_country] => US [patent_app_date] => 2011-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6511 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0122/20110122677.pdf [firstpage_image] =>[orig_patent_app_number] => 13014360 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/014360
Semiconductor memory device Jan 25, 2011 Issued
Array ( [id] => 8561049 [patent_doc_number] => 08335116 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-18 [patent_title] => 'Semiconductor storage device' [patent_app_type] => utility [patent_app_number] => 13/014510 [patent_app_country] => US [patent_app_date] => 2011-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 5026 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13014510 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/014510
Semiconductor storage device Jan 25, 2011 Issued
Array ( [id] => 8847736 [patent_doc_number] => 08456926 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-04 [patent_title] => 'Memory write error correction circuit' [patent_app_type] => utility [patent_app_number] => 13/013616 [patent_app_country] => US [patent_app_date] => 2011-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 7234 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13013616 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/013616
Memory write error correction circuit Jan 24, 2011 Issued
Array ( [id] => 8311790 [patent_doc_number] => 20120188820 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-26 [patent_title] => 'SYSTEM AND METHOD FOR ADDRESSING THRESHOLD VOLTAGE SHIFTS OF MEMORY CELLS IN AN ELECTRONIC PRODUCT' [patent_app_type] => utility [patent_app_number] => 13/011706 [patent_app_country] => US [patent_app_date] => 2011-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3740 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13011706 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/011706
System and method for addressing threshold voltage shifts of memory cells in an electronic product Jan 20, 2011 Issued
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