Trong Q. Phan

Array ( [id] => 8318523 [patent_doc_number] => 08233310 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-31 [patent_title] => 'Resistance-change memory' [patent_app_type] => utility [patent_app_number] => 12/847892 [patent_app_country] => US [patent_app_date] => 2010-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 30 [patent_no_of_words] => 7156 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12847892 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7524032 [patent_doc_number] => 08027196 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-09-27 [patent_title] => 'Parallel programming of multiple-bit-per-cell memory cells by controlling program pulsewidth and programming voltage' [patent_app_type] => utility [patent_app_number] => 12/846886 [patent_app_country] => US [patent_app_date] => 2010-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 26 [patent_no_of_words] => 13860 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/027/08027196.pdf [firstpage_image] =>[orig_patent_app_number] => 12846886 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7802309 [patent_doc_number] => 08130586 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-06 [patent_title] => 'Semiconductor memory device and method of controlling the same' [patent_app_type] => utility [patent_app_number] => 12/847955 [patent_app_country] => US [patent_app_date] => 2010-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 19316 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/130/08130586.pdf [firstpage_image] =>[orig_patent_app_number] => 12847955 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8117277 [patent_doc_number] => 08159862 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-17 [patent_title] => 'Recycling charges' [patent_app_type] => utility [patent_app_number] => 12/843366 [patent_app_country] => US [patent_app_date] => 2010-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3450 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/159/08159862.pdf [firstpage_image] =>[orig_patent_app_number] => 12843366 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6144876 [patent_doc_number] => 20110017723 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-27 [patent_title] => 'OPERATOR CONTROL UNIT' [patent_app_type] => utility [patent_app_number] => 12/843334 [patent_app_country] => US [patent_app_date] => 2010-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1975 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0017/20110017723.pdf [firstpage_image] =>[orig_patent_app_number] => 12843334 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8858948 [patent_doc_number] => 08461483 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-11 [patent_title] => 'Engine driven welding power supplies with two piece shaft' [patent_app_type] => utility [patent_app_number] => 12/841282 [patent_app_country] => US [patent_app_date] => 2010-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 4585 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12841282 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7740951 [patent_doc_number] => 20120020171 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-26 [patent_title] => 'MEMORY SYSTEM WITH DELAY LOCKED LOOP (DLL) BYPASS CONTROL' [patent_app_type] => utility [patent_app_number] => 12/840879 [patent_app_country] => US [patent_app_date] => 2010-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5070 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20120020171.pdf [firstpage_image] =>[orig_patent_app_number] => 12840879 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6426068 [patent_doc_number] => 20100277964 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-04 [patent_title] => 'MULTI-BANK MEMORY' [patent_app_type] => utility [patent_app_number] => 12/838835 [patent_app_country] => US [patent_app_date] => 2010-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3146 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0277/20100277964.pdf [firstpage_image] =>[orig_patent_app_number] => 12838835 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6106888 [patent_doc_number] => 20110187429 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-04 [patent_title] => 'SEMICONDUCTOR APPARATUS' [patent_app_type] => utility [patent_app_number] => 12/838332 [patent_app_country] => US [patent_app_date] => 2010-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3935 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0187/20110187429.pdf [firstpage_image] =>[orig_patent_app_number] => 12838332 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6426325 [patent_doc_number] => 20100277991 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-04 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/838119 [patent_app_country] => US [patent_app_date] => 2010-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 8790 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0277/20100277991.pdf [firstpage_image] =>[orig_patent_app_number] => 12838119 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7577880 [patent_doc_number] => 20110291762 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-01 [patent_title] => 'INTEGRATED CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/834744 [patent_app_country] => US [patent_app_date] => 2010-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8837 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0291/20110291762.pdf [firstpage_image] =>[orig_patent_app_number] => 12834744 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7571461 [patent_doc_number] => 20110267117 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-03 [patent_title] => 'DATA INPUT/OUTPUT APPARATUS AND METHOD FOR SEMICONDUCTOR SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/832312 [patent_app_country] => US [patent_app_date] => 2010-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8028 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0267/20110267117.pdf [firstpage_image] =>[orig_patent_app_number] => 12832312 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6233453 [patent_doc_number] => 20100265772 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-21 [patent_title] => 'NAND MEMORY DEVICE AND PROGRAMMING METHODS' [patent_app_type] => utility [patent_app_number] => 12/827892 [patent_app_country] => US [patent_app_date] => 2010-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2430 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0265/20100265772.pdf [firstpage_image] =>[orig_patent_app_number] => 12827892 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6337270 [patent_doc_number] => 20100328979 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-30 [patent_title] => 'NONVOLATILE MEMORY DEVICE AND OPERATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/826162 [patent_app_country] => US [patent_app_date] => 2010-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3301 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0328/20100328979.pdf [firstpage_image] =>[orig_patent_app_number] => 12826162 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8471270 [patent_doc_number] => 08300460 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-30 [patent_title] => 'Nonvolatile memory device' [patent_app_type] => utility [patent_app_number] => 12/826570 [patent_app_country] => US [patent_app_date] => 2010-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8504 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12826570 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6337701 [patent_doc_number] => 20100329042 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-30 [patent_title] => 'MEMORY CHIP PACKAGE WITH EFFICIENT DATA I/O CONTROL' [patent_app_type] => utility [patent_app_number] => 12/826518 [patent_app_country] => US [patent_app_date] => 2010-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3421 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0329/20100329042.pdf [firstpage_image] =>[orig_patent_app_number] => 12826518 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7668224 [patent_doc_number] => 20110317493 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-29 [patent_title] => 'Method and Apparatus of Performing An Erase Operation on a Memory Integrated Circuit' [patent_app_type] => utility [patent_app_number] => 12/826280 [patent_app_country] => US [patent_app_date] => 2010-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5485 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12826280 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8593364 [patent_doc_number] => 08351241 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-08 [patent_title] => 'Rectification element and method for resistive switching for non volatile memory device' [patent_app_type] => utility [patent_app_number] => 12/826653 [patent_app_country] => US [patent_app_date] => 2010-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 5737 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12826653 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8631376 [patent_doc_number] => 08363460 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-29 [patent_title] => 'Method and apparatus for programming a magnetic tunnel junction (MTJ)' [patent_app_type] => utility [patent_app_number] => 12/826546 [patent_app_country] => US [patent_app_date] => 2010-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 26 [patent_no_of_words] => 15799 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12826546 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6337627 [patent_doc_number] => 20100329030 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-30 [patent_title] => 'NONVOLATILE MEMORY DEVICE AND METHOD OF PROGRAMMING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/826064 [patent_app_country] => US [patent_app_date] => 2010-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9961 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0329/20100329030.pdf [firstpage_image] =>[orig_patent_app_number] => 12826064 [rel_patent_id] =>[rel_patent_doc_number] =>)