
Trong Q. Phan
Examiner (ID: 14718, Phone: (571)272-1794 , Office: P/2825 )
| Most Active Art Unit | 2818 |
| Art Unit(s) | 2511, 2825, 2899, 2818, 2827, 2824, 2504 |
| Total Applications | 3077 |
| Issued Applications | 2717 |
| Pending Applications | 50 |
| Abandoned Applications | 311 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8271698
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[patent_title] => 'Method of manufacturing semiconductor device and semiconductor device'
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Array
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Array
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[id] => 6093243
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[patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE'
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Array
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[patent_issue_date] => 2011-01-06
[patent_title] => 'ULTIMATE MAGNETIC RANDOM ACCESS MEMORY-BASED TERNARY CAM'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/821284 | Ultimate magnetic random access memory-based ternary cam | Jun 22, 2010 | Issued |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/820364 | Semiconductor memory device having a latency controller | Jun 21, 2010 | Issued |
Array
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[patent_issue_date] => 2010-12-23
[patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND WRITE METHOD FOR THE SAME'
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Array
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[patent_title] => 'Interleave Memory Array Arrangement'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/821064 | Interleave Memory Array Arrangement | Jun 21, 2010 | Abandoned |
Array
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[patent_title] => 'NONVOLATILE MEMORY DEVICES OPERABLE USING NEGATIVE BIAS VOLTAGES AND RELATED METHODS OF OPERATION'
[patent_app_type] => utility
[patent_app_number] => 12/820628
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/820628 | Nonvolatile memory devices operable using negative bias voltages and related methods of operation | Jun 21, 2010 | Issued |
Array
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[id] => 6331150
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Array
(
[id] => 7990393
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[patent_title] => 'Volatile memory elements with soft error upset immunity'
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Array
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Array
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Array
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Array
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Array
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