Search

Trong Q. Phan

Examiner (ID: 14718, Phone: (571)272-1794 , Office: P/2825 )

Most Active Art Unit
2818
Art Unit(s)
2511, 2825, 2899, 2818, 2827, 2824, 2504
Total Applications
3077
Issued Applications
2717
Pending Applications
50
Abandoned Applications
311

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8271698 [patent_doc_number] => 08213209 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-03 [patent_title] => 'Method of manufacturing semiconductor device and semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/826100 [patent_app_country] => US [patent_app_date] => 2010-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 21 [patent_no_of_words] => 8985 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12826100 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/826100
Method of manufacturing semiconductor device and semiconductor device Jun 28, 2010 Issued
Array ( [id] => 8447710 [patent_doc_number] => 08289769 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-16 [patent_title] => 'Method of programming nonvolatile memory device' [patent_app_type] => utility [patent_app_number] => 12/826402 [patent_app_country] => US [patent_app_date] => 2010-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 12918 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12826402 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/826402
Method of programming nonvolatile memory device Jun 28, 2010 Issued
Array ( [id] => 6093243 [patent_doc_number] => 20110002173 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-06 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/821632 [patent_app_country] => US [patent_app_date] => 2010-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7091 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20110002173.pdf [firstpage_image] =>[orig_patent_app_number] => 12821632 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/821632
Nonvolatile semiconductor memory device Jun 22, 2010 Issued
Array ( [id] => 6093187 [patent_doc_number] => 20110002151 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-06 [patent_title] => 'ULTIMATE MAGNETIC RANDOM ACCESS MEMORY-BASED TERNARY CAM' [patent_app_type] => utility [patent_app_number] => 12/821284 [patent_app_country] => US [patent_app_date] => 2010-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6819 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20110002151.pdf [firstpage_image] =>[orig_patent_app_number] => 12821284 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/821284
Ultimate magnetic random access memory-based ternary cam Jun 22, 2010 Issued
Array ( [id] => 6337731 [patent_doc_number] => 20100329049 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-30 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE HAVING A LATENCY CONTROLLER' [patent_app_type] => utility [patent_app_number] => 12/820364 [patent_app_country] => US [patent_app_date] => 2010-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6779 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0329/20100329049.pdf [firstpage_image] =>[orig_patent_app_number] => 12820364 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/820364
Semiconductor memory device having a latency controller Jun 21, 2010 Issued
Array ( [id] => 6588412 [patent_doc_number] => 20100322012 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-23 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND WRITE METHOD FOR THE SAME' [patent_app_type] => utility [patent_app_number] => 12/820342 [patent_app_country] => US [patent_app_date] => 2010-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 16619 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0322/20100322012.pdf [firstpage_image] =>[orig_patent_app_number] => 12820342 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/820342
Nonvolatile semiconductor memory device and write method for the same Jun 21, 2010 Issued
Array ( [id] => 7661411 [patent_doc_number] => 20110310680 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-22 [patent_title] => 'Interleave Memory Array Arrangement' [patent_app_type] => utility [patent_app_number] => 12/821064 [patent_app_country] => US [patent_app_date] => 2010-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1973 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0310/20110310680.pdf [firstpage_image] =>[orig_patent_app_number] => 12821064 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/821064
Interleave Memory Array Arrangement Jun 21, 2010 Abandoned
Array ( [id] => 5983244 [patent_doc_number] => 20110096602 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-28 [patent_title] => 'NONVOLATILE MEMORY DEVICES OPERABLE USING NEGATIVE BIAS VOLTAGES AND RELATED METHODS OF OPERATION' [patent_app_type] => utility [patent_app_number] => 12/820628 [patent_app_country] => US [patent_app_date] => 2010-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 12366 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0096/20110096602.pdf [firstpage_image] =>[orig_patent_app_number] => 12820628 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/820628
Nonvolatile memory devices operable using negative bias voltages and related methods of operation Jun 21, 2010 Issued
Array ( [id] => 6331150 [patent_doc_number] => 20100327954 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-30 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/820476 [patent_app_country] => US [patent_app_date] => 2010-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 16641 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0327/20100327954.pdf [firstpage_image] =>[orig_patent_app_number] => 12820476 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/820476
Semiconductor device Jun 21, 2010 Issued
Array ( [id] => 7990393 [patent_doc_number] => 08077500 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-12-13 [patent_title] => 'Volatile memory elements with soft error upset immunity' [patent_app_type] => utility [patent_app_number] => 12/820410 [patent_app_country] => US [patent_app_date] => 2010-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 8099 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/077/08077500.pdf [firstpage_image] =>[orig_patent_app_number] => 12820410 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/820410
Volatile memory elements with soft error upset immunity Jun 21, 2010 Issued
Array ( [id] => 11265688 [patent_doc_number] => 09489989 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-08 [patent_title] => 'Voltage regulators, memory circuits, and operating methods thereof' [patent_app_type] => utility [patent_app_number] => 12/820712 [patent_app_country] => US [patent_app_date] => 2010-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4126 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12820712 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/820712
Voltage regulators, memory circuits, and operating methods thereof Jun 21, 2010 Issued
Array ( [id] => 8204631 [patent_doc_number] => 08189403 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-29 [patent_title] => 'High speed linear differential amplifier' [patent_app_type] => utility [patent_app_number] => 12/817760 [patent_app_country] => US [patent_app_date] => 2010-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 8026 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/189/08189403.pdf [firstpage_image] =>[orig_patent_app_number] => 12817760 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/817760
High speed linear differential amplifier Jun 16, 2010 Issued
Array ( [id] => 6491970 [patent_doc_number] => 20100214864 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-26 [patent_title] => 'MEMORY DEVICE COMMAND DECODING SYSTEM AND MEMORY DEVICE AND PROCESSOR-BASED SYSTEM USING SAME' [patent_app_type] => utility [patent_app_number] => 12/776154 [patent_app_country] => US [patent_app_date] => 2010-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5618 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0214/20100214864.pdf [firstpage_image] =>[orig_patent_app_number] => 12776154 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/776154
Memory device command decoding system and memory device and processor-based system using same May 6, 2010 Issued
Array ( [id] => 6491791 [patent_doc_number] => 20100214847 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-26 [patent_title] => 'SEMICONDUCTOR STORAGE DEVICE AND READ VOLTAGE CORRECTION METHOD' [patent_app_type] => utility [patent_app_number] => 12/775221 [patent_app_country] => US [patent_app_date] => 2010-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4816 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0214/20100214847.pdf [firstpage_image] =>[orig_patent_app_number] => 12775221 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/775221
Semiconductor storage device and read voltage correction method May 5, 2010 Issued
Array ( [id] => 8957425 [patent_doc_number] => 08503211 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-06 [patent_title] => 'Configurable module and memory subsystem' [patent_app_type] => utility [patent_app_number] => 12/770376 [patent_app_country] => US [patent_app_date] => 2010-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 6824 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12770376 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/770376
Configurable module and memory subsystem Apr 28, 2010 Issued
Array ( [id] => 9429222 [patent_doc_number] => 08705304 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-22 [patent_title] => 'Current mode sense amplifier with passive load' [patent_app_type] => utility [patent_app_number] => 12/732968 [patent_app_country] => US [patent_app_date] => 2010-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 3894 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12732968 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/732968
Current mode sense amplifier with passive load Mar 25, 2010 Issued
Array ( [id] => 6289651 [patent_doc_number] => 20100238746 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-23 [patent_title] => 'READING CIRCUITRY IN MEMORY' [patent_app_type] => utility [patent_app_number] => 12/748030 [patent_app_country] => US [patent_app_date] => 2010-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2516 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0238/20100238746.pdf [firstpage_image] =>[orig_patent_app_number] => 12748030 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/748030
Reading circuitry in memory Mar 25, 2010 Issued
Array ( [id] => 7485174 [patent_doc_number] => 20110235438 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-29 [patent_title] => 'TEMPORAL ALIGNMENT OF DATA UNIT GROUPS IN A SWITCH' [patent_app_type] => utility [patent_app_number] => 12/731948 [patent_app_country] => US [patent_app_date] => 2010-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5410 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0235/20110235438.pdf [firstpage_image] =>[orig_patent_app_number] => 12731948 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/731948
Temporal alignment of data unit groups in a switch Mar 24, 2010 Issued
Array ( [id] => 7485039 [patent_doc_number] => 20110235391 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-29 [patent_title] => 'Reference Cell Write Operations At A Memory' [patent_app_type] => utility [patent_app_number] => 12/731204 [patent_app_country] => US [patent_app_date] => 2010-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7247 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0235/20110235391.pdf [firstpage_image] =>[orig_patent_app_number] => 12731204 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/731204
Reference cell write operations at a memory Mar 24, 2010 Issued
Array ( [id] => 6331740 [patent_doc_number] => 20100246283 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-30 [patent_title] => 'REFERENCE POTENTIAL GENERATING CIRCUIT OF SEMICONDUCTOR MEMORY' [patent_app_type] => utility [patent_app_number] => 12/730362 [patent_app_country] => US [patent_app_date] => 2010-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4009 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0246/20100246283.pdf [firstpage_image] =>[orig_patent_app_number] => 12730362 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/730362
Reference potential generating circuit of semiconductor memory Mar 23, 2010 Issued
Menu