
Trong Q. Phan
Examiner (ID: 14718, Phone: (571)272-1794 , Office: P/2825 )
| Most Active Art Unit | 2818 |
| Art Unit(s) | 2511, 2825, 2899, 2818, 2827, 2824, 2504 |
| Total Applications | 3077 |
| Issued Applications | 2717 |
| Pending Applications | 50 |
| Abandoned Applications | 311 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5544383
[patent_doc_number] => 20090154260
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-06-18
[patent_title] => 'SCAN SENSING METHOD THAT IMPROVES SENSING MARGINS'
[patent_app_type] => utility
[patent_app_number] => 11/957366
[patent_app_country] => US
[patent_app_date] => 2007-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 5970
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0154/20090154260.pdf
[firstpage_image] =>[orig_patent_app_number] => 11957366
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/957366 | Scan sensing method that improves sensing margins | Dec 13, 2007 | Issued |
Array
(
[id] => 5335796
[patent_doc_number] => 20090052260
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-02-26
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 11/956822
[patent_app_country] => US
[patent_app_date] => 2007-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3222
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0052/20090052260.pdf
[firstpage_image] =>[orig_patent_app_number] => 11956822
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/956822 | Semiconductor memory device | Dec 13, 2007 | Issued |
Array
(
[id] => 5544338
[patent_doc_number] => 20090154215
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-06-18
[patent_title] => 'REDUCING NOISE AND DISTURBANCE BETWEEN MEMORY STORAGE ELEMENTS USING ANGLED WORDLINES'
[patent_app_type] => utility
[patent_app_number] => 11/957028
[patent_app_country] => US
[patent_app_date] => 2007-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 15625
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0154/20090154215.pdf
[firstpage_image] =>[orig_patent_app_number] => 11957028
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/957028 | REDUCING NOISE AND DISTURBANCE BETWEEN MEMORY STORAGE ELEMENTS USING ANGLED WORDLINES | Dec 13, 2007 | Abandoned |
Array
(
[id] => 5295121
[patent_doc_number] => 20090010047
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-01-08
[patent_title] => 'WRITING CIRCUIT FOR A PHASE CHANGE MEMORY'
[patent_app_type] => utility
[patent_app_number] => 11/957044
[patent_app_country] => US
[patent_app_date] => 2007-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 3889
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0010/20090010047.pdf
[firstpage_image] =>[orig_patent_app_number] => 11957044
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/957044 | Writing circuit for a phase change memory | Dec 13, 2007 | Issued |
Array
(
[id] => 7779789
[patent_doc_number] => 08122186
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-02-21
[patent_title] => 'Memory device, memory system and dual port memory device with self-copy function'
[patent_app_type] => utility
[patent_app_number] => 12/515697
[patent_app_country] => US
[patent_app_date] => 2007-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 7515
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/122/08122186.pdf
[firstpage_image] =>[orig_patent_app_number] => 12515697
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/515697 | Memory device, memory system and dual port memory device with self-copy function | Nov 20, 2007 | Issued |
Array
(
[id] => 4703214
[patent_doc_number] => 20080062737
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-03-13
[patent_title] => 'Local digit line architecture and method for memory devices having multi-bit or low capacitance memory cells'
[patent_app_type] => utility
[patent_app_number] => 11/983617
[patent_app_country] => US
[patent_app_date] => 2007-11-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4540
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0062/20080062737.pdf
[firstpage_image] =>[orig_patent_app_number] => 11983617
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/983617 | Local digit line architecture and method for memory devices having multi-bit or low capacitance memory cells | Nov 8, 2007 | Issued |
Array
(
[id] => 4942148
[patent_doc_number] => 20080079471
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-04-03
[patent_title] => 'Plateline Driver with Ramp Rate Control'
[patent_app_type] => utility
[patent_app_number] => 11/937303
[patent_app_country] => US
[patent_app_date] => 2007-11-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4910
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0079/20080079471.pdf
[firstpage_image] =>[orig_patent_app_number] => 11937303
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/937303 | Plateline Driver with Ramp Rate Control | Nov 7, 2007 | Abandoned |
Array
(
[id] => 4937608
[patent_doc_number] => 20080074925
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-03-27
[patent_title] => 'Nonvolatile memory device including circuit formed of thin film transistors'
[patent_app_type] => utility
[patent_app_number] => 11/979767
[patent_app_country] => US
[patent_app_date] => 2007-11-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 12434
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0074/20080074925.pdf
[firstpage_image] =>[orig_patent_app_number] => 11979767
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/979767 | Nonvolatile memory device including circuit formed of thin film transistors | Nov 7, 2007 | Issued |
Array
(
[id] => 8158038
[patent_doc_number] => 08171209
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-05-01
[patent_title] => 'Write protection method and device for at least one random access memory device'
[patent_app_type] => utility
[patent_app_number] => 12/513285
[patent_app_country] => US
[patent_app_date] => 2007-11-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 7057
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/171/08171209.pdf
[firstpage_image] =>[orig_patent_app_number] => 12513285
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/513285 | Write protection method and device for at least one random access memory device | Nov 1, 2007 | Issued |
Array
(
[id] => 4587462
[patent_doc_number] => 07835167
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-11-16
[patent_title] => 'Magnetic domain data storage devices and methods of operating the same'
[patent_app_type] => utility
[patent_app_number] => 11/980418
[patent_app_country] => US
[patent_app_date] => 2007-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5364
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/835/07835167.pdf
[firstpage_image] =>[orig_patent_app_number] => 11980418
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/980418 | Magnetic domain data storage devices and methods of operating the same | Oct 30, 2007 | Issued |
Array
(
[id] => 1077968
[patent_doc_number] => 07616485
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-11-10
[patent_title] => 'Semiconductor memory device having faulty cells'
[patent_app_type] => utility
[patent_app_number] => 11/931881
[patent_app_country] => US
[patent_app_date] => 2007-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 12785
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 165
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/616/07616485.pdf
[firstpage_image] =>[orig_patent_app_number] => 11931881
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/931881 | Semiconductor memory device having faulty cells | Oct 30, 2007 | Issued |
Array
(
[id] => 589054
[patent_doc_number] => 07453724
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-11-18
[patent_title] => 'Flash memory device having improved program rate'
[patent_app_type] => utility
[patent_app_number] => 11/931992
[patent_app_country] => US
[patent_app_date] => 2007-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4949
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/453/07453724.pdf
[firstpage_image] =>[orig_patent_app_number] => 11931992
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/931992 | Flash memory device having improved program rate | Oct 30, 2007 | Issued |
Array
(
[id] => 4577121
[patent_doc_number] => 07848141
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-12-07
[patent_title] => 'Multi-level cell copyback program method in a non-volatile memory device'
[patent_app_type] => utility
[patent_app_number] => 11/926130
[patent_app_country] => US
[patent_app_date] => 2007-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 15
[patent_no_of_words] => 10883
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 337
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/848/07848141.pdf
[firstpage_image] =>[orig_patent_app_number] => 11926130
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/926130 | Multi-level cell copyback program method in a non-volatile memory device | Oct 28, 2007 | Issued |
Array
(
[id] => 4582265
[patent_doc_number] => 07830695
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2010-11-09
[patent_title] => 'Capacitive arrangement for qubit operations'
[patent_app_type] => utility
[patent_app_number] => 11/927402
[patent_app_country] => US
[patent_app_date] => 2007-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2404
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/830/07830695.pdf
[firstpage_image] =>[orig_patent_app_number] => 11927402
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/927402 | Capacitive arrangement for qubit operations | Oct 28, 2007 | Issued |
Array
(
[id] => 323660
[patent_doc_number] => 07518901
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-04-14
[patent_title] => 'Ferroelectric semiconductor memory device and method for reading the same'
[patent_app_type] => utility
[patent_app_number] => 11/877890
[patent_app_country] => US
[patent_app_date] => 2007-10-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3934
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/518/07518901.pdf
[firstpage_image] =>[orig_patent_app_number] => 11877890
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/877890 | Ferroelectric semiconductor memory device and method for reading the same | Oct 23, 2007 | Issued |
Array
(
[id] => 4823182
[patent_doc_number] => 20080123435
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-05-29
[patent_title] => 'Operation of Nonvolatile Memory Having Modified Channel Region Interface'
[patent_app_type] => utility
[patent_app_number] => 11/877522
[patent_app_country] => US
[patent_app_date] => 2007-10-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 34
[patent_figures_cnt] => 34
[patent_no_of_words] => 8642
[patent_no_of_claims] => 68
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0123/20080123435.pdf
[firstpage_image] =>[orig_patent_app_number] => 11877522
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/877522 | Operation of Nonvolatile Memory Having Modified Channel Region Interface | Oct 22, 2007 | Abandoned |
Array
(
[id] => 4892023
[patent_doc_number] => 20080101120
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-05-01
[patent_title] => 'METHOD OF PROGRAMMING MULTI-PAGES AND FLASH MEMORY DEVICE OF PERFORMING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 11/877302
[patent_app_country] => US
[patent_app_date] => 2007-10-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 6388
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0101/20080101120.pdf
[firstpage_image] =>[orig_patent_app_number] => 11877302
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/877302 | METHOD OF PROGRAMMING MULTI-PAGES AND FLASH MEMORY DEVICE OF PERFORMING THE SAME | Oct 22, 2007 | Abandoned |
Array
(
[id] => 4515218
[patent_doc_number] => 07916543
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-03-29
[patent_title] => 'Memory cell operation'
[patent_app_type] => utility
[patent_app_number] => 11/876406
[patent_app_country] => US
[patent_app_date] => 2007-10-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 15
[patent_no_of_words] => 14472
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/916/07916543.pdf
[firstpage_image] =>[orig_patent_app_number] => 11876406
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/876406 | Memory cell operation | Oct 21, 2007 | Issued |
Array
(
[id] => 4668447
[patent_doc_number] => 20080043507
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-02-21
[patent_title] => 'CONTENT ADDRESSABLE MEMORY WITH TWISTED DATA LINES'
[patent_app_type] => utility
[patent_app_number] => 11/876118
[patent_app_country] => US
[patent_app_date] => 2007-10-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 16337
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0043/20080043507.pdf
[firstpage_image] =>[orig_patent_app_number] => 11876118
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/876118 | Content addressable memory with twisted data lines | Oct 21, 2007 | Issued |
Array
(
[id] => 4892007
[patent_doc_number] => 20080101104
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-05-01
[patent_title] => 'Stacked memory'
[patent_app_type] => utility
[patent_app_number] => 11/907876
[patent_app_country] => US
[patent_app_date] => 2007-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 8120
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0101/20080101104.pdf
[firstpage_image] =>[orig_patent_app_number] => 11907876
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/907876 | Stacked memory | Oct 17, 2007 | Issued |