
Trong Q. Phan
Examiner (ID: 14718, Phone: (571)272-1794 , Office: P/2825 )
| Most Active Art Unit | 2818 |
| Art Unit(s) | 2511, 2825, 2899, 2818, 2827, 2824, 2504 |
| Total Applications | 3077 |
| Issued Applications | 2717 |
| Pending Applications | 50 |
| Abandoned Applications | 311 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 170845
[patent_doc_number] => 07668009
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-02-23
[patent_title] => 'Method of decreasing program disturb in memory cells'
[patent_app_type] => utility
[patent_app_number] => 11/874902
[patent_app_country] => US
[patent_app_date] => 2007-10-18
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[pdf_file] => patents/07/668/07668009.pdf
[firstpage_image] =>[orig_patent_app_number] => 11874902
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/874902 | Method of decreasing program disturb in memory cells | Oct 17, 2007 | Issued |
Array
(
[id] => 5584180
[patent_doc_number] => 20090103382
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-04-23
[patent_title] => 'Gated Diode Sense Amplifiers'
[patent_app_type] => utility
[patent_app_number] => 11/874220
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[patent_app_date] => 2007-10-18
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/874220 | Gated Diode Sense Amplifiers | Oct 17, 2007 | Abandoned |
Array
(
[id] => 4914300
[patent_doc_number] => 20080094900
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-04-24
[patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY'
[patent_app_type] => utility
[patent_app_number] => 11/874458
[patent_app_country] => US
[patent_app_date] => 2007-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/874458 | NONVOLATILE SEMICONDUCTOR MEMORY | Oct 17, 2007 | Abandoned |
Array
(
[id] => 4892032
[patent_doc_number] => 20080101129
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-05-01
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => utility
[patent_app_number] => 11/907870
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[patent_app_date] => 2007-10-18
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Array
(
[id] => 5584184
[patent_doc_number] => 20090103386
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[patent_kind] => A1
[patent_issue_date] => 2009-04-23
[patent_title] => 'SELECTIVELY-POWERED MEMORIES'
[patent_app_type] => utility
[patent_app_number] => 11/874692
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[patent_app_date] => 2007-10-18
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 11874692
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/874692 | Selectively-powered memories | Oct 17, 2007 | Issued |
Array
(
[id] => 5584160
[patent_doc_number] => 20090103362
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-04-23
[patent_title] => 'SYSTEM AND METHOD FOR SETTING ACCESS AND MODIFICATION FOR SYNCHRONOUS SERIAL INTERFACE NAND'
[patent_app_type] => utility
[patent_app_number] => 11/873826
[patent_app_country] => US
[patent_app_date] => 2007-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[pdf_file] => publications/A1/0103/20090103362.pdf
[firstpage_image] =>[orig_patent_app_number] => 11873826
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/873826 | System and method for setting access and modification for synchronous serial interface NAND | Oct 16, 2007 | Issued |
Array
(
[id] => 178994
[patent_doc_number] => 07656705
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-02-02
[patent_title] => 'Fast single phase program algorithm for quadbit'
[patent_app_type] => utility
[patent_app_number] => 11/874076
[patent_app_country] => US
[patent_app_date] => 2007-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
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[pdf_file] => patents/07/656/07656705.pdf
[firstpage_image] =>[orig_patent_app_number] => 11874076
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/874076 | Fast single phase program algorithm for quadbit | Oct 16, 2007 | Issued |
Array
(
[id] => 5584152
[patent_doc_number] => 20090103354
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-04-23
[patent_title] => 'Ground Level Precharge Bit Line Scheme for Read Operation in Spin Transfer Torque Magnetoresistive Random Access Memory'
[patent_app_type] => utility
[patent_app_number] => 11/873684
[patent_app_country] => US
[patent_app_date] => 2007-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[pdf_file] => publications/A1/0103/20090103354.pdf
[firstpage_image] =>[orig_patent_app_number] => 11873684
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/873684 | Ground Level Precharge Bit Line Scheme for Read Operation in Spin Transfer Torque Magnetoresistive Random Access Memory | Oct 16, 2007 | Abandoned |
Array
(
[id] => 297048
[patent_doc_number] => 07542325
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-06-02
[patent_title] => 'Ferroelectric memory'
[patent_app_type] => utility
[patent_app_number] => 11/873764
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[pdf_file] => patents/07/542/07542325.pdf
[firstpage_image] =>[orig_patent_app_number] => 11873764
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/873764 | Ferroelectric memory | Oct 16, 2007 | Issued |
Array
(
[id] => 7746833
[patent_doc_number] => 08108885
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-01-31
[patent_title] => 'Disk cartridge'
[patent_app_type] => utility
[patent_app_number] => 12/374753
[patent_app_country] => US
[patent_app_date] => 2007-10-11
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/08/108/08108885.pdf
[firstpage_image] =>[orig_patent_app_number] => 12374753
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/374753 | Disk cartridge | Oct 10, 2007 | Issued |
Array
(
[id] => 5526020
[patent_doc_number] => 20090196097
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[patent_kind] => A1
[patent_issue_date] => 2009-08-06
[patent_title] => 'Device for reading memory data and method using the same'
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[pdf_file] => publications/A1/0196/20090196097.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/907082 | Device for reading memory data and method using the same | Oct 8, 2007 | Issued |
Array
(
[id] => 4650067
[patent_doc_number] => 20080037323
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[patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT AND NONVOLATILE MEMORY ELEMENT'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/869564 | Semiconductor integrated circuit and nonvolatile memory element | Oct 8, 2007 | Issued |
Array
(
[id] => 4656260
[patent_doc_number] => 20080025121
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[patent_title] => 'METHOD AND APPARATUS FOR GENERATING TEMPERATURE-COMPENSATED READ AND VERIFY OPERATIONS IN FLASH MEMORIES'
[patent_app_type] => utility
[patent_app_number] => 11/866264
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Array
(
[id] => 4662308
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[patent_title] => 'Semiconductor memory circuit'
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Array
(
[id] => 4801769
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/861959 | Multi-bank memory | Sep 25, 2007 | Issued |
Array
(
[id] => 4920591
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Array
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Array
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Array
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Array
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