Search

Trong Q. Phan

Examiner (ID: 14718, Phone: (571)272-1794 , Office: P/2825 )

Most Active Art Unit
2818
Art Unit(s)
2511, 2825, 2899, 2818, 2827, 2824, 2504
Total Applications
3077
Issued Applications
2717
Pending Applications
50
Abandoned Applications
311

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 170845 [patent_doc_number] => 07668009 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-02-23 [patent_title] => 'Method of decreasing program disturb in memory cells' [patent_app_type] => utility [patent_app_number] => 11/874902 [patent_app_country] => US [patent_app_date] => 2007-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4264 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/668/07668009.pdf [firstpage_image] =>[orig_patent_app_number] => 11874902 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/874902
Method of decreasing program disturb in memory cells Oct 17, 2007 Issued
Array ( [id] => 5584180 [patent_doc_number] => 20090103382 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-23 [patent_title] => 'Gated Diode Sense Amplifiers' [patent_app_type] => utility [patent_app_number] => 11/874220 [patent_app_country] => US [patent_app_date] => 2007-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4036 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0103/20090103382.pdf [firstpage_image] =>[orig_patent_app_number] => 11874220 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/874220
Gated Diode Sense Amplifiers Oct 17, 2007 Abandoned
Array ( [id] => 4914300 [patent_doc_number] => 20080094900 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-24 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY' [patent_app_type] => utility [patent_app_number] => 11/874458 [patent_app_country] => US [patent_app_date] => 2007-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 5222 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20080094900.pdf [firstpage_image] =>[orig_patent_app_number] => 11874458 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/874458
NONVOLATILE SEMICONDUCTOR MEMORY Oct 17, 2007 Abandoned
Array ( [id] => 4892032 [patent_doc_number] => 20080101129 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-01 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/907870 [patent_app_country] => US [patent_app_date] => 2007-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4442 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0101/20080101129.pdf [firstpage_image] =>[orig_patent_app_number] => 11907870 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/907870
Semiconductor memory device Oct 17, 2007 Issued
Array ( [id] => 5584184 [patent_doc_number] => 20090103386 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-23 [patent_title] => 'SELECTIVELY-POWERED MEMORIES' [patent_app_type] => utility [patent_app_number] => 11/874692 [patent_app_country] => US [patent_app_date] => 2007-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3356 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0103/20090103386.pdf [firstpage_image] =>[orig_patent_app_number] => 11874692 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/874692
Selectively-powered memories Oct 17, 2007 Issued
Array ( [id] => 5584160 [patent_doc_number] => 20090103362 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-23 [patent_title] => 'SYSTEM AND METHOD FOR SETTING ACCESS AND MODIFICATION FOR SYNCHRONOUS SERIAL INTERFACE NAND' [patent_app_type] => utility [patent_app_number] => 11/873826 [patent_app_country] => US [patent_app_date] => 2007-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4733 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0103/20090103362.pdf [firstpage_image] =>[orig_patent_app_number] => 11873826 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/873826
System and method for setting access and modification for synchronous serial interface NAND Oct 16, 2007 Issued
Array ( [id] => 178994 [patent_doc_number] => 07656705 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-02-02 [patent_title] => 'Fast single phase program algorithm for quadbit' [patent_app_type] => utility [patent_app_number] => 11/874076 [patent_app_country] => US [patent_app_date] => 2007-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 11044 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/656/07656705.pdf [firstpage_image] =>[orig_patent_app_number] => 11874076 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/874076
Fast single phase program algorithm for quadbit Oct 16, 2007 Issued
Array ( [id] => 5584152 [patent_doc_number] => 20090103354 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-23 [patent_title] => 'Ground Level Precharge Bit Line Scheme for Read Operation in Spin Transfer Torque Magnetoresistive Random Access Memory' [patent_app_type] => utility [patent_app_number] => 11/873684 [patent_app_country] => US [patent_app_date] => 2007-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3630 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0103/20090103354.pdf [firstpage_image] =>[orig_patent_app_number] => 11873684 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/873684
Ground Level Precharge Bit Line Scheme for Read Operation in Spin Transfer Torque Magnetoresistive Random Access Memory Oct 16, 2007 Abandoned
Array ( [id] => 297048 [patent_doc_number] => 07542325 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-02 [patent_title] => 'Ferroelectric memory' [patent_app_type] => utility [patent_app_number] => 11/873764 [patent_app_country] => US [patent_app_date] => 2007-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 7513 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/542/07542325.pdf [firstpage_image] =>[orig_patent_app_number] => 11873764 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/873764
Ferroelectric memory Oct 16, 2007 Issued
Array ( [id] => 7746833 [patent_doc_number] => 08108885 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-01-31 [patent_title] => 'Disk cartridge' [patent_app_type] => utility [patent_app_number] => 12/374753 [patent_app_country] => US [patent_app_date] => 2007-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 48 [patent_no_of_words] => 29806 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 269 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/108/08108885.pdf [firstpage_image] =>[orig_patent_app_number] => 12374753 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/374753
Disk cartridge Oct 10, 2007 Issued
Array ( [id] => 5526020 [patent_doc_number] => 20090196097 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-06 [patent_title] => 'Device for reading memory data and method using the same' [patent_app_type] => utility [patent_app_number] => 11/907082 [patent_app_country] => US [patent_app_date] => 2007-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5796 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0196/20090196097.pdf [firstpage_image] =>[orig_patent_app_number] => 11907082 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/907082
Device for reading memory data and method using the same Oct 8, 2007 Issued
Array ( [id] => 4650067 [patent_doc_number] => 20080037323 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-14 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT AND NONVOLATILE MEMORY ELEMENT' [patent_app_type] => utility [patent_app_number] => 11/869564 [patent_app_country] => US [patent_app_date] => 2007-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 22486 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0037/20080037323.pdf [firstpage_image] =>[orig_patent_app_number] => 11869564 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/869564
Semiconductor integrated circuit and nonvolatile memory element Oct 8, 2007 Issued
Array ( [id] => 4656260 [patent_doc_number] => 20080025121 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-31 [patent_title] => 'METHOD AND APPARATUS FOR GENERATING TEMPERATURE-COMPENSATED READ AND VERIFY OPERATIONS IN FLASH MEMORIES' [patent_app_type] => utility [patent_app_number] => 11/866264 [patent_app_country] => US [patent_app_date] => 2007-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6460 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20080025121.pdf [firstpage_image] =>[orig_patent_app_number] => 11866264 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/866264
Method and apparatus for generating temperature-compensated read and verify operations in flash memories Oct 1, 2007 Issued
Array ( [id] => 4662308 [patent_doc_number] => 20080253215 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-16 [patent_title] => 'Semiconductor memory circuit' [patent_app_type] => utility [patent_app_number] => 11/902877 [patent_app_country] => US [patent_app_date] => 2007-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 16934 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0253/20080253215.pdf [firstpage_image] =>[orig_patent_app_number] => 11902877 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/902877
Semiconductor memory circuit Sep 25, 2007 Issued
Array ( [id] => 4801769 [patent_doc_number] => 20080013356 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-17 [patent_title] => 'MULTI-BANK MEMORY' [patent_app_type] => utility [patent_app_number] => 11/861959 [patent_app_country] => US [patent_app_date] => 2007-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3024 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0013/20080013356.pdf [firstpage_image] =>[orig_patent_app_number] => 11861959 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/861959
Multi-bank memory Sep 25, 2007 Issued
Array ( [id] => 4920591 [patent_doc_number] => 20080068905 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-20 [patent_title] => 'Reparable semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/902114 [patent_app_country] => US [patent_app_date] => 2007-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5321 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0068/20080068905.pdf [firstpage_image] =>[orig_patent_app_number] => 11902114 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/902114
Reparable semiconductor memory device Sep 18, 2007 Abandoned
Array ( [id] => 4920595 [patent_doc_number] => 20080068909 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-20 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/902006 [patent_app_country] => US [patent_app_date] => 2007-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 9999 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0068/20080068909.pdf [firstpage_image] =>[orig_patent_app_number] => 11902006 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/902006
Semiconductor device Sep 17, 2007 Issued
Array ( [id] => 124253 [patent_doc_number] => 07710778 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-04 [patent_title] => 'NAND flash memory with reduced programming disturbance' [patent_app_type] => utility [patent_app_number] => 11/901596 [patent_app_country] => US [patent_app_date] => 2007-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 5531 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/710/07710778.pdf [firstpage_image] =>[orig_patent_app_number] => 11901596 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/901596
NAND flash memory with reduced programming disturbance Sep 16, 2007 Issued
Array ( [id] => 4823118 [patent_doc_number] => 20080123391 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-29 [patent_title] => 'Memory system and resistive memory device including buffer memory for reduced overhead' [patent_app_type] => utility [patent_app_number] => 11/901438 [patent_app_country] => US [patent_app_date] => 2007-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3804 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0123/20080123391.pdf [firstpage_image] =>[orig_patent_app_number] => 11901438 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/901438
Memory system and resistive memory device including buffer memory for reduced overhead Sep 16, 2007 Abandoned
Array ( [id] => 104627 [patent_doc_number] => 07729191 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-01 [patent_title] => 'Memory device command decoding system and memory device and processor-based system using same' [patent_app_type] => utility [patent_app_number] => 11/899738 [patent_app_country] => US [patent_app_date] => 2007-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5729 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/729/07729191.pdf [firstpage_image] =>[orig_patent_app_number] => 11899738 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/899738
Memory device command decoding system and memory device and processor-based system using same Sep 5, 2007 Issued
Menu