Search

Trong Q. Phan

Examiner (ID: 14718, Phone: (571)272-1794 , Office: P/2825 )

Most Active Art Unit
2818
Art Unit(s)
2511, 2825, 2899, 2818, 2827, 2824, 2504
Total Applications
3077
Issued Applications
2717
Pending Applications
50
Abandoned Applications
311

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 187096 [patent_doc_number] => 07646638 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-01-12 [patent_title] => 'Non-volatile memory cell that inhibits over-erasure and related method and memory array' [patent_app_type] => utility [patent_app_number] => 11/899462 [patent_app_country] => US [patent_app_date] => 2007-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 5367 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/646/07646638.pdf [firstpage_image] =>[orig_patent_app_number] => 11899462 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/899462
Non-volatile memory cell that inhibits over-erasure and related method and memory array Sep 5, 2007 Issued
Array ( [id] => 5347710 [patent_doc_number] => 20090003071 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-01 [patent_title] => 'SEMICONDUCTOR STORAGE DEVICE AND READ VOLTAGE CORRECTION METHOD' [patent_app_type] => utility [patent_app_number] => 11/850390 [patent_app_country] => US [patent_app_date] => 2007-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4791 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0003/20090003071.pdf [firstpage_image] =>[orig_patent_app_number] => 11850390 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/850390
SEMICONDUCTOR STORAGE DEVICE AND READ VOLTAGE CORRECTION METHOD Sep 4, 2007 Abandoned
Array ( [id] => 8690368 [patent_doc_number] => 08389897 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-05 [patent_title] => 'Welding method for carrying out a welding process' [patent_app_type] => utility [patent_app_number] => 12/310873 [patent_app_country] => US [patent_app_date] => 2007-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 11761 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12310873 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/310873
Welding method for carrying out a welding process Sep 2, 2007 Issued
Array ( [id] => 6571971 [patent_doc_number] => 20100096383 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-22 [patent_title] => 'TEMPERATURE AND HUMIDITY-CONTROLLED COMPOSITE MATERIAL ARTICLE, AND METHODS FOR USING SUCH AN ARTICLE' [patent_app_type] => utility [patent_app_number] => 12/530405 [patent_app_country] => US [patent_app_date] => 2007-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4224 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0096/20100096383.pdf [firstpage_image] =>[orig_patent_app_number] => 12530405 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/530405
Temperature and humidity-controlled composite material article, and methods for using such an article Aug 30, 2007 Issued
Array ( [id] => 5084074 [patent_doc_number] => 20070274125 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-29 [patent_title] => 'Enhanced Programming Performance in a Nonvolatile Memory Device Having a Bipolar Programmable Storage Element' [patent_app_type] => utility [patent_app_number] => 11/839239 [patent_app_country] => US [patent_app_date] => 2007-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4665 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0274/20070274125.pdf [firstpage_image] =>[orig_patent_app_number] => 11839239 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/839239
Enhanced Programming Performance in a Nonvolatile Memory Device Having a Bipolar Programmable Storage Element Aug 14, 2007 Abandoned
Array ( [id] => 4587549 [patent_doc_number] => 07835181 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-16 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/839341 [patent_app_country] => US [patent_app_date] => 2007-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 3420 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/835/07835181.pdf [firstpage_image] =>[orig_patent_app_number] => 11839341 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/839341
Semiconductor memory device Aug 14, 2007 Issued
Array ( [id] => 4725574 [patent_doc_number] => 20080205115 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-28 [patent_title] => 'APPARATUS AND METHOD FOR TRIMMING INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 11/836362 [patent_app_country] => US [patent_app_date] => 2007-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2021 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0205/20080205115.pdf [firstpage_image] =>[orig_patent_app_number] => 11836362 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/836362
APPARATUS AND METHOD FOR TRIMMING INTEGRATED CIRCUIT Aug 8, 2007 Abandoned
Array ( [id] => 4668473 [patent_doc_number] => 20080043533 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-21 [patent_title] => 'NAND FLASH MEMORY' [patent_app_type] => utility [patent_app_number] => 11/836378 [patent_app_country] => US [patent_app_date] => 2007-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8113 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0043/20080043533.pdf [firstpage_image] =>[orig_patent_app_number] => 11836378 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/836378
NAND flash memory Aug 8, 2007 Issued
Array ( [id] => 5229442 [patent_doc_number] => 20070291549 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-20 [patent_title] => 'Nonvolatile semiconductor storage apparatus and readout method' [patent_app_type] => utility [patent_app_number] => 11/882990 [patent_app_country] => US [patent_app_date] => 2007-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4998 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0291/20070291549.pdf [firstpage_image] =>[orig_patent_app_number] => 11882990 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/882990
Nonvolatile semiconductor storage apparatus and readout method Aug 7, 2007 Issued
Array ( [id] => 4908412 [patent_doc_number] => 20080019178 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-24 [patent_title] => 'ELECTRONIC DEVICE INCLUDING A MEMORY ARRAY AND CONDUCTIVE LINES' [patent_app_type] => utility [patent_app_number] => 11/834391 [patent_app_country] => US [patent_app_date] => 2007-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 16974 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0019/20080019178.pdf [firstpage_image] =>[orig_patent_app_number] => 11834391 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/834391
Electronic device including a memory array and conductive lines Aug 5, 2007 Issued
Array ( [id] => 4908434 [patent_doc_number] => 20080019200 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-24 [patent_title] => 'INTEGRATED CIRCUIT CHIP WITH IMPROVED ARRAY STABILITY' [patent_app_type] => utility [patent_app_number] => 11/782282 [patent_app_country] => US [patent_app_date] => 2007-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3517 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0019/20080019200.pdf [firstpage_image] =>[orig_patent_app_number] => 11782282 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/782282
Integrated circuit chip with improved array stability Jul 23, 2007 Issued
Array ( [id] => 94652 [patent_doc_number] => 07733700 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-08 [patent_title] => 'Method and structures for highly efficient hot carrier injection programming for non-volatile memories' [patent_app_type] => utility [patent_app_number] => 11/779838 [patent_app_country] => US [patent_app_date] => 2007-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7005 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/733/07733700.pdf [firstpage_image] =>[orig_patent_app_number] => 11779838 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/779838
Method and structures for highly efficient hot carrier injection programming for non-volatile memories Jul 17, 2007 Issued
Array ( [id] => 850378 [patent_doc_number] => 07382638 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-06-03 [patent_title] => 'Matchline sense circuit and method' [patent_app_type] => utility [patent_app_number] => 11/774881 [patent_app_country] => US [patent_app_date] => 2007-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 8869 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/382/07382638.pdf [firstpage_image] =>[orig_patent_app_number] => 11774881 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/774881
Matchline sense circuit and method Jul 8, 2007 Issued
Array ( [id] => 4750972 [patent_doc_number] => 20080159043 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-03 [patent_title] => 'Negative voltage generator for use in semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/819786 [patent_app_country] => US [patent_app_date] => 2007-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4307 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0159/20080159043.pdf [firstpage_image] =>[orig_patent_app_number] => 11819786 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/819786
Negative voltage generator for use in semiconductor memory device Jun 28, 2007 Issued
Array ( [id] => 4548910 [patent_doc_number] => 07876636 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-25 [patent_title] => 'Semiconductor memory device and method for driving the same' [patent_app_type] => utility [patent_app_number] => 11/819788 [patent_app_country] => US [patent_app_date] => 2007-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3414 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/876/07876636.pdf [firstpage_image] =>[orig_patent_app_number] => 11819788 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/819788
Semiconductor memory device and method for driving the same Jun 28, 2007 Issued
Array ( [id] => 4937620 [patent_doc_number] => 20080074937 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-27 [patent_title] => 'Semiconductor memory device having precharge signal generator and its driving method' [patent_app_type] => utility [patent_app_number] => 11/819570 [patent_app_country] => US [patent_app_date] => 2007-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5326 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0074/20080074937.pdf [firstpage_image] =>[orig_patent_app_number] => 11819570 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/819570
Semiconductor memory device having precharge signal generator and its driving method Jun 27, 2007 Issued
Array ( [id] => 4571436 [patent_doc_number] => 07839714 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-23 [patent_title] => 'Non-volatile semiconductor storage device and word line drive method' [patent_app_type] => utility [patent_app_number] => 11/819746 [patent_app_country] => US [patent_app_date] => 2007-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5715 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/839/07839714.pdf [firstpage_image] =>[orig_patent_app_number] => 11819746 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/819746
Non-volatile semiconductor storage device and word line drive method Jun 27, 2007 Issued
Array ( [id] => 5347722 [patent_doc_number] => 20090003083 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-01 [patent_title] => 'Memory cell with voltage modulated sidewall poly resistor' [patent_app_type] => utility [patent_app_number] => 11/819562 [patent_app_country] => US [patent_app_date] => 2007-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3911 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0003/20090003083.pdf [firstpage_image] =>[orig_patent_app_number] => 11819562 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/819562
Memory cell with voltage modulated sidewall poly resistor Jun 27, 2007 Abandoned
Array ( [id] => 5197933 [patent_doc_number] => 20070297251 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-27 [patent_title] => 'Semiconductor memory device having memory block configuration' [patent_app_type] => utility [patent_app_number] => 11/819203 [patent_app_country] => US [patent_app_date] => 2007-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 11222 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0297/20070297251.pdf [firstpage_image] =>[orig_patent_app_number] => 11819203 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/819203
Semiconductor memory device having memory block configuration Jun 25, 2007 Issued
Array ( [id] => 603483 [patent_doc_number] => 07433253 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-07 [patent_title] => 'Integrated circuit, method of operating an integrated circuit, method of manufacturing an integrated circuit, memory module, stackable memory module' [patent_app_type] => utility [patent_app_number] => 11/768508 [patent_app_country] => US [patent_app_date] => 2007-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 20 [patent_no_of_words] => 16587 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/433/07433253.pdf [firstpage_image] =>[orig_patent_app_number] => 11768508 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/768508
Integrated circuit, method of operating an integrated circuit, method of manufacturing an integrated circuit, memory module, stackable memory module Jun 25, 2007 Issued
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