Search

Trong Q. Phan

Examiner (ID: 14718, Phone: (571)272-1794 , Office: P/2825 )

Most Active Art Unit
2818
Art Unit(s)
2511, 2825, 2899, 2818, 2827, 2824, 2504
Total Applications
3077
Issued Applications
2717
Pending Applications
50
Abandoned Applications
311

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4452864 [patent_doc_number] => 07965551 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-21 [patent_title] => 'Method for metal bit line arrangement' [patent_app_type] => utility [patent_app_number] => 11/703115 [patent_app_country] => US [patent_app_date] => 2007-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3371 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 281 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/965/07965551.pdf [firstpage_image] =>[orig_patent_app_number] => 11703115 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/703115
Method for metal bit line arrangement Feb 6, 2007 Issued
Array ( [id] => 437111 [patent_doc_number] => 07262983 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-28 [patent_title] => 'Semiconductor memory' [patent_app_type] => utility [patent_app_number] => 11/652012 [patent_app_country] => US [patent_app_date] => 2007-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 7824 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 330 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/262/07262983.pdf [firstpage_image] =>[orig_patent_app_number] => 11652012 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/652012
Semiconductor memory Jan 10, 2007 Issued
Array ( [id] => 858778 [patent_doc_number] => 07376011 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-20 [patent_title] => 'Method and structure for efficient data verification operation for non-volatile memories' [patent_app_type] => utility [patent_app_number] => 11/619991 [patent_app_country] => US [patent_app_date] => 2007-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 9523 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/376/07376011.pdf [firstpage_image] =>[orig_patent_app_number] => 11619991 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/619991
Method and structure for efficient data verification operation for non-volatile memories Jan 3, 2007 Issued
Array ( [id] => 5164406 [patent_doc_number] => 20070285990 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-13 [patent_title] => 'Semiconductor device and method for compensating voltage drop of a bit line' [patent_app_type] => utility [patent_app_number] => 11/648293 [patent_app_country] => US [patent_app_date] => 2006-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5163 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0285/20070285990.pdf [firstpage_image] =>[orig_patent_app_number] => 11648293 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/648293
Semiconductor device and method for compensating voltage drop of a bit line Dec 28, 2006 Abandoned
Array ( [id] => 5099975 [patent_doc_number] => 20070183236 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-09 [patent_title] => 'Circuit and method for supplying power to sense amplifier in semiconductor memory apparatus' [patent_app_type] => utility [patent_app_number] => 11/647477 [patent_app_country] => US [patent_app_date] => 2006-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3170 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0183/20070183236.pdf [firstpage_image] =>[orig_patent_app_number] => 11647477 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/647477
Circuit and method for supplying power to sense amplifier in semiconductor memory apparatus Dec 28, 2006 Issued
Array ( [id] => 5164414 [patent_doc_number] => 20070285998 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-13 [patent_title] => 'Semiconductor memory apparatus' [patent_app_type] => utility [patent_app_number] => 11/647483 [patent_app_country] => US [patent_app_date] => 2006-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3932 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0285/20070285998.pdf [firstpage_image] =>[orig_patent_app_number] => 11647483 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/647483
Semiconductor memory apparatus Dec 28, 2006 Issued
Array ( [id] => 4770382 [patent_doc_number] => 20080056040 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-06 [patent_title] => 'Memory device having function of detecting bit line sense amp mismatch' [patent_app_type] => utility [patent_app_number] => 11/647631 [patent_app_country] => US [patent_app_date] => 2006-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3844 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0056/20080056040.pdf [firstpage_image] =>[orig_patent_app_number] => 11647631 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/647631
Memory device having function of detecting bit line sense amp mismatch Dec 28, 2006 Issued
Array ( [id] => 300865 [patent_doc_number] => 07539072 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-05-26 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/647707 [patent_app_country] => US [patent_app_date] => 2006-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 6016 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/539/07539072.pdf [firstpage_image] =>[orig_patent_app_number] => 11647707 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/647707
Semiconductor memory device Dec 28, 2006 Issued
Array ( [id] => 5246306 [patent_doc_number] => 20070242540 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-18 [patent_title] => 'Semiconductor memory device with temperature sensing device and operation thereof' [patent_app_type] => utility [patent_app_number] => 11/647409 [patent_app_country] => US [patent_app_date] => 2006-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3064 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0242/20070242540.pdf [firstpage_image] =>[orig_patent_app_number] => 11647409 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/647409
Semiconductor memory device with temperature sensing device and operation thereof Dec 28, 2006 Issued
Array ( [id] => 5090619 [patent_doc_number] => 20070230258 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-04 [patent_title] => 'Semiconductor memory device for controlling bit line sense amplifying operation using row and column addresses' [patent_app_type] => utility [patent_app_number] => 11/648337 [patent_app_country] => US [patent_app_date] => 2006-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3003 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0230/20070230258.pdf [firstpage_image] =>[orig_patent_app_number] => 11648337 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/648337
Semiconductor memory device for controlling bit line sense amplifying operation using row and column addresses Dec 28, 2006 Abandoned
Array ( [id] => 161379 [patent_doc_number] => 07675798 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-09 [patent_title] => 'Sense amplifier control circuit and semiconductor device using the same' [patent_app_type] => utility [patent_app_number] => 11/648321 [patent_app_country] => US [patent_app_date] => 2006-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5979 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/675/07675798.pdf [firstpage_image] =>[orig_patent_app_number] => 11648321 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/648321
Sense amplifier control circuit and semiconductor device using the same Dec 28, 2006 Issued
Array ( [id] => 4754725 [patent_doc_number] => 20080162801 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-03 [patent_title] => 'Series termination for a low power memory interface' [patent_app_type] => utility [patent_app_number] => 11/647641 [patent_app_country] => US [patent_app_date] => 2006-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2134 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0162/20080162801.pdf [firstpage_image] =>[orig_patent_app_number] => 11647641 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/647641
Series termination for a low power memory interface Dec 28, 2006 Abandoned
Array ( [id] => 104553 [patent_doc_number] => 07729155 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-01 [patent_title] => 'High speed, low power, low leakage read only memory' [patent_app_type] => utility [patent_app_number] => 11/648105 [patent_app_country] => US [patent_app_date] => 2006-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2258 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/729/07729155.pdf [firstpage_image] =>[orig_patent_app_number] => 11648105 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/648105
High speed, low power, low leakage read only memory Dec 28, 2006 Issued
Array ( [id] => 5197943 [patent_doc_number] => 20070297261 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-27 [patent_title] => 'Apparatus and method of generating power up signal of semiconductor integrated circuit' [patent_app_type] => utility [patent_app_number] => 11/647479 [patent_app_country] => US [patent_app_date] => 2006-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3483 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0297/20070297261.pdf [firstpage_image] =>[orig_patent_app_number] => 11647479 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/647479
Apparatus and method of generating power up signal of semiconductor integrated circuit Dec 28, 2006 Issued
Array ( [id] => 312092 [patent_doc_number] => 07529128 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-05-05 [patent_title] => 'Integrated code and data flash memory' [patent_app_type] => utility [patent_app_number] => 11/617613 [patent_app_country] => US [patent_app_date] => 2006-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 5028 [patent_no_of_claims] => 64 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/529/07529128.pdf [firstpage_image] =>[orig_patent_app_number] => 11617613 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/617613
Integrated code and data flash memory Dec 27, 2006 Issued
Array ( [id] => 346164 [patent_doc_number] => 07499356 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-03-03 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/647685 [patent_app_country] => US [patent_app_date] => 2006-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 10101 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/499/07499356.pdf [firstpage_image] =>[orig_patent_app_number] => 11647685 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/647685
Semiconductor memory device Dec 27, 2006 Issued
Array ( [id] => 4931716 [patent_doc_number] => 20080002491 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-03 [patent_title] => 'Semiconductor memory device capable of effectively testing failure of data' [patent_app_type] => utility [patent_app_number] => 11/647633 [patent_app_country] => US [patent_app_date] => 2006-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2768 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20080002491.pdf [firstpage_image] =>[orig_patent_app_number] => 11647633 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/647633
Semiconductor memory device capable of effectively testing failure of data Dec 27, 2006 Issued
Array ( [id] => 5033219 [patent_doc_number] => 20070097758 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-03 [patent_title] => 'Power supply circuit for delay locked loop and its method' [patent_app_type] => utility [patent_app_number] => 11/641350 [patent_app_country] => US [patent_app_date] => 2006-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3912 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0097/20070097758.pdf [firstpage_image] =>[orig_patent_app_number] => 11641350 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/641350
Power supply circuit for delay locked loop and its method Dec 18, 2006 Issued
Array ( [id] => 5251835 [patent_doc_number] => 20070133291 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-14 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 11/610193 [patent_app_country] => US [patent_app_date] => 2006-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5453 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20070133291.pdf [firstpage_image] =>[orig_patent_app_number] => 11610193 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/610193
Nonvolatile semiconductor memory device Dec 12, 2006 Issued
Array ( [id] => 4491692 [patent_doc_number] => 07903447 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-08 [patent_title] => 'Method, apparatus and computer program product for read before programming process on programmable resistive memory cell' [patent_app_type] => utility [patent_app_number] => 11/610293 [patent_app_country] => US [patent_app_date] => 2006-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 8097 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/903/07903447.pdf [firstpage_image] =>[orig_patent_app_number] => 11610293 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/610293
Method, apparatus and computer program product for read before programming process on programmable resistive memory cell Dec 12, 2006 Issued
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