Search

Trong Q. Phan

Examiner (ID: 14718, Phone: (571)272-1794 , Office: P/2825 )

Most Active Art Unit
2818
Art Unit(s)
2511, 2825, 2899, 2818, 2827, 2824, 2504
Total Applications
3077
Issued Applications
2717
Pending Applications
50
Abandoned Applications
311

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4942951 [patent_doc_number] => 20080080276 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-03 [patent_title] => 'Clock frequency doubler method and apparatus for serial flash testing' [patent_app_type] => utility [patent_app_number] => 11/526124 [patent_app_country] => US [patent_app_date] => 2006-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8700 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20080080276.pdf [firstpage_image] =>[orig_patent_app_number] => 11526124 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/526124
Clock frequency doubler method and apparatus for serial flash testing Sep 21, 2006 Issued
Array ( [id] => 264742 [patent_doc_number] => 07570513 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-08-04 [patent_title] => 'Non-volatile memory and method with power-saving read and program-verify operations' [patent_app_type] => utility [patent_app_number] => 11/534307 [patent_app_country] => US [patent_app_date] => 2006-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 40 [patent_no_of_words] => 16854 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/570/07570513.pdf [firstpage_image] =>[orig_patent_app_number] => 11534307 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/534307
Non-volatile memory and method with power-saving read and program-verify operations Sep 21, 2006 Issued
Array ( [id] => 5105639 [patent_doc_number] => 20070064514 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-22 [patent_title] => 'Control unit and portable terminal' [patent_app_type] => utility [patent_app_number] => 11/525010 [patent_app_country] => US [patent_app_date] => 2006-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 8961 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0064/20070064514.pdf [firstpage_image] =>[orig_patent_app_number] => 11525010 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/525010
Control unit and portable terminal Sep 21, 2006 Abandoned
Array ( [id] => 5192923 [patent_doc_number] => 20070081405 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-12 [patent_title] => 'LOW POWER MEMORY CONTROL CIRCUITS AND METHODS' [patent_app_type] => utility [patent_app_number] => 11/534609 [patent_app_country] => US [patent_app_date] => 2006-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 11496 [patent_no_of_claims] => 130 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0081/20070081405.pdf [firstpage_image] =>[orig_patent_app_number] => 11534609 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/534609
Low power memory control circuits and methods Sep 21, 2006 Issued
Array ( [id] => 5074186 [patent_doc_number] => 20070014161 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-18 [patent_title] => 'Non-Volatile Memory and Method With Power-Saving Read and Program-Verify Operations' [patent_app_type] => utility [patent_app_number] => 11/534297 [patent_app_country] => US [patent_app_date] => 2006-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 16489 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0014/20070014161.pdf [firstpage_image] =>[orig_patent_app_number] => 11534297 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/534297
Non-volatile memory and method with power-saving read and program-verify operations Sep 21, 2006 Issued
Array ( [id] => 811778 [patent_doc_number] => 07417882 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-08-26 [patent_title] => 'Content addressable memory device' [patent_app_type] => utility [patent_app_number] => 11/525274 [patent_app_country] => US [patent_app_date] => 2006-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 16 [patent_no_of_words] => 5769 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/417/07417882.pdf [firstpage_image] =>[orig_patent_app_number] => 11525274 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/525274
Content addressable memory device Sep 20, 2006 Issued
Array ( [id] => 4937605 [patent_doc_number] => 20080074922 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-27 [patent_title] => '2-TRANSISTOR NONVOLATILE MEMORY CELL' [patent_app_type] => utility [patent_app_number] => 11/533791 [patent_app_country] => US [patent_app_date] => 2006-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 2450 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0074/20080074922.pdf [firstpage_image] =>[orig_patent_app_number] => 11533791 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/533791
2-TRANSISTOR NONVOLATILE MEMORY CELL Sep 20, 2006 Abandoned
Array ( [id] => 5134858 [patent_doc_number] => 20070076487 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-05 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE' [patent_app_type] => utility [patent_app_number] => 11/533205 [patent_app_country] => US [patent_app_date] => 2006-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 18521 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0076/20070076487.pdf [firstpage_image] =>[orig_patent_app_number] => 11533205 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/533205
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE Sep 18, 2006 Abandoned
Array ( [id] => 5134865 [patent_doc_number] => 20070076494 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-05 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE' [patent_app_type] => utility [patent_app_number] => 11/533061 [patent_app_country] => US [patent_app_date] => 2006-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 15297 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0076/20070076494.pdf [firstpage_image] =>[orig_patent_app_number] => 11533061 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/533061
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE Sep 18, 2006 Abandoned
Array ( [id] => 8690370 [patent_doc_number] => 08389899 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-05 [patent_title] => 'Connector for connecting welding torch' [patent_app_type] => utility [patent_app_number] => 12/294234 [patent_app_country] => US [patent_app_date] => 2006-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4920 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 545 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12294234 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/294234
Connector for connecting welding torch Sep 11, 2006 Issued
Array ( [id] => 4480912 [patent_doc_number] => 07869296 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-11 [patent_title] => 'Semiconductor memory device, and method of controlling the same' [patent_app_type] => utility [patent_app_number] => 11/515852 [patent_app_country] => US [patent_app_date] => 2006-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 19303 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/869/07869296.pdf [firstpage_image] =>[orig_patent_app_number] => 11515852 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/515852
Semiconductor memory device, and method of controlling the same Sep 5, 2006 Issued
Array ( [id] => 5140460 [patent_doc_number] => 20070002676 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-04 [patent_title] => 'Buffered continuous multi-drop clock ring' [patent_app_type] => utility [patent_app_number] => 11/516824 [patent_app_country] => US [patent_app_date] => 2006-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1717 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20070002676.pdf [firstpage_image] =>[orig_patent_app_number] => 11516824 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/516824
Buffered continuous multi-drop clock ring Sep 5, 2006 Abandoned
Array ( [id] => 364872 [patent_doc_number] => 07483323 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-01-27 [patent_title] => 'Semiconductor memory device, and method of controlling the same' [patent_app_type] => utility [patent_app_number] => 11/515853 [patent_app_country] => US [patent_app_date] => 2006-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 19306 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/483/07483323.pdf [firstpage_image] =>[orig_patent_app_number] => 11515853 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/515853
Semiconductor memory device, and method of controlling the same Sep 5, 2006 Issued
Array ( [id] => 4668461 [patent_doc_number] => 20080043521 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-21 [patent_title] => 'Method of determining a memory state of a resistive memory cell and device measuring the memory state of a resistive memory cell' [patent_app_type] => utility [patent_app_number] => 11/507362 [patent_app_country] => US [patent_app_date] => 2006-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8555 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0043/20080043521.pdf [firstpage_image] =>[orig_patent_app_number] => 11507362 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/507362
Method of determining a memory state of a resistive memory cell and device measuring the memory state of a resistive memory cell Aug 20, 2006 Issued
Array ( [id] => 596482 [patent_doc_number] => 07440302 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-21 [patent_title] => 'Ferroelectric information storage device and method of writing/reading information' [patent_app_type] => utility [patent_app_number] => 11/500890 [patent_app_country] => US [patent_app_date] => 2006-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 3569 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/440/07440302.pdf [firstpage_image] =>[orig_patent_app_number] => 11500890 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/500890
Ferroelectric information storage device and method of writing/reading information Aug 8, 2006 Issued
Array ( [id] => 5055557 [patent_doc_number] => 20070058478 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-15 [patent_title] => 'Interface circuit' [patent_app_type] => utility [patent_app_number] => 11/499692 [patent_app_country] => US [patent_app_date] => 2006-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6932 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0058/20070058478.pdf [firstpage_image] =>[orig_patent_app_number] => 11499692 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/499692
Interface circuit Aug 6, 2006 Issued
Array ( [id] => 4686848 [patent_doc_number] => 20080031029 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-07 [patent_title] => 'Semiconductor memory device with split bit-line structure' [patent_app_type] => utility [patent_app_number] => 11/499278 [patent_app_country] => US [patent_app_date] => 2006-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2961 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0031/20080031029.pdf [firstpage_image] =>[orig_patent_app_number] => 11499278 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/499278
Semiconductor memory device with split bit-line structure Aug 4, 2006 Abandoned
Array ( [id] => 5158694 [patent_doc_number] => 20070171738 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-26 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/499156 [patent_app_country] => US [patent_app_date] => 2006-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10662 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0171/20070171738.pdf [firstpage_image] =>[orig_patent_app_number] => 11499156 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/499156
Semiconductor memory device Aug 3, 2006 Issued
Array ( [id] => 838461 [patent_doc_number] => 07394691 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-07-01 [patent_title] => 'Semiconductor memory device which prevents destruction of data' [patent_app_type] => utility [patent_app_number] => 11/498142 [patent_app_country] => US [patent_app_date] => 2006-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 30 [patent_no_of_words] => 13868 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/394/07394691.pdf [firstpage_image] =>[orig_patent_app_number] => 11498142 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/498142
Semiconductor memory device which prevents destruction of data Aug 2, 2006 Issued
Array ( [id] => 4686886 [patent_doc_number] => 20080031067 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-07 [patent_title] => 'Block erase for volatile memory' [patent_app_type] => utility [patent_app_number] => 11/499622 [patent_app_country] => US [patent_app_date] => 2006-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7269 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0031/20080031067.pdf [firstpage_image] =>[orig_patent_app_number] => 11499622 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/499622
Block erase for volatile memory Aug 2, 2006 Issued
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