
Trong Q. Phan
Examiner (ID: 14718, Phone: (571)272-1794 , Office: P/2825 )
| Most Active Art Unit | 2818 |
| Art Unit(s) | 2511, 2825, 2899, 2818, 2827, 2824, 2504 |
| Total Applications | 3077 |
| Issued Applications | 2717 |
| Pending Applications | 50 |
| Abandoned Applications | 311 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4981686
[patent_doc_number] => 20070086244
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-04-19
[patent_title] => 'Data restoration in case of page-programming failure'
[patent_app_type] => utility
[patent_app_number] => 11/497366
[patent_app_country] => US
[patent_app_date] => 2006-08-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4783
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0086/20070086244.pdf
[firstpage_image] =>[orig_patent_app_number] => 11497366
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/497366 | Data restoration in case of page-programming failure | Aug 1, 2006 | Abandoned |
Array
(
[id] => 874853
[patent_doc_number] => 07362643
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-04-22
[patent_title] => 'Semiconductor-memory device and bank refresh method'
[patent_app_type] => utility
[patent_app_number] => 11/496578
[patent_app_country] => US
[patent_app_date] => 2006-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 4342
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/362/07362643.pdf
[firstpage_image] =>[orig_patent_app_number] => 11496578
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/496578 | Semiconductor-memory device and bank refresh method | Jul 31, 2006 | Issued |
Array
(
[id] => 5050187
[patent_doc_number] => 20070030731
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-02-08
[patent_title] => 'Non-volatile semiconductor memory device'
[patent_app_type] => utility
[patent_app_number] => 11/496458
[patent_app_country] => US
[patent_app_date] => 2006-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 10047
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0030/20070030731.pdf
[firstpage_image] =>[orig_patent_app_number] => 11496458
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/496458 | Non-volatile semiconductor memory device | Jul 31, 2006 | Issued |
Array
(
[id] => 870806
[patent_doc_number] => 07366031
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-04-29
[patent_title] => 'Memory arrangement and method for addressing a memory'
[patent_app_type] => utility
[patent_app_number] => 11/497536
[patent_app_country] => US
[patent_app_date] => 2006-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 7051
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 57
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/366/07366031.pdf
[firstpage_image] =>[orig_patent_app_number] => 11497536
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/497536 | Memory arrangement and method for addressing a memory | Jul 31, 2006 | Issued |
Array
(
[id] => 811825
[patent_doc_number] => 07417916
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-08-26
[patent_title] => 'Methods of reducing coupling noise between wordlines'
[patent_app_type] => utility
[patent_app_number] => 11/497126
[patent_app_country] => US
[patent_app_date] => 2006-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 2941
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 209
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/417/07417916.pdf
[firstpage_image] =>[orig_patent_app_number] => 11497126
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/497126 | Methods of reducing coupling noise between wordlines | Jul 31, 2006 | Issued |
Array
(
[id] => 5168845
[patent_doc_number] => 20070069276
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-03-29
[patent_title] => 'Multi-use memory cell and memory array'
[patent_app_type] => utility
[patent_app_number] => 11/496985
[patent_app_country] => US
[patent_app_date] => 2006-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 15695
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0069/20070069276.pdf
[firstpage_image] =>[orig_patent_app_number] => 11496985
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/496985 | Multi-use memory cell and memory array | Jul 30, 2006 | Abandoned |
Array
(
[id] => 4656208
[patent_doc_number] => 20080025069
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-31
[patent_title] => 'Mixed-use memory array with different data states'
[patent_app_type] => utility
[patent_app_number] => 11/496870
[patent_app_country] => US
[patent_app_date] => 2006-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 15586
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0025/20080025069.pdf
[firstpage_image] =>[orig_patent_app_number] => 11496870
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/496870 | Mixed-use memory array with different data states | Jul 30, 2006 | Abandoned |
Array
(
[id] => 24612
[patent_doc_number] => 07800933
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-09-21
[patent_title] => 'Method for using a memory cell comprising switchable semiconductor memory element with trimmable resistance'
[patent_app_type] => utility
[patent_app_number] => 11/496986
[patent_app_country] => US
[patent_app_date] => 2006-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 18
[patent_no_of_words] => 11388
[patent_no_of_claims] => 50
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 267
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/800/07800933.pdf
[firstpage_image] =>[orig_patent_app_number] => 11496986
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/496986 | Method for using a memory cell comprising switchable semiconductor memory element with trimmable resistance | Jul 30, 2006 | Issued |
Array
(
[id] => 4976022
[patent_doc_number] => 20070217253
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-09-20
[patent_title] => 'Non-volatile phase-change memory device and associated program-suspend-read operation'
[patent_app_type] => utility
[patent_app_number] => 11/486100
[patent_app_country] => US
[patent_app_date] => 2006-07-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 9537
[patent_no_of_claims] => 42
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0217/20070217253.pdf
[firstpage_image] =>[orig_patent_app_number] => 11486100
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/486100 | Non-volatile phase-change memory device and associated program-suspend-read operation | Jul 13, 2006 | Issued |
Array
(
[id] => 906096
[patent_doc_number] => 07336550
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-02-26
[patent_title] => 'Semiconductor memory device with reduced multi-row address testing'
[patent_app_type] => utility
[patent_app_number] => 11/486184
[patent_app_country] => US
[patent_app_date] => 2006-07-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4461
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/336/07336550.pdf
[firstpage_image] =>[orig_patent_app_number] => 11486184
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/486184 | Semiconductor memory device with reduced multi-row address testing | Jul 12, 2006 | Issued |
Array
(
[id] => 5147263
[patent_doc_number] => 20070047317
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-03-01
[patent_title] => 'Nonvolatile semiconductor memory devices'
[patent_app_type] => utility
[patent_app_number] => 11/485524
[patent_app_country] => US
[patent_app_date] => 2006-07-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4999
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0047/20070047317.pdf
[firstpage_image] =>[orig_patent_app_number] => 11485524
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/485524 | Nonvolatile semiconductor memory devices | Jul 12, 2006 | Issued |
Array
(
[id] => 7754057
[patent_doc_number] => 08111537
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-02-07
[patent_title] => 'Semiconductor memory'
[patent_app_type] => utility
[patent_app_number] => 11/484740
[patent_app_country] => US
[patent_app_date] => 2006-07-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 8027
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 219
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/111/08111537.pdf
[firstpage_image] =>[orig_patent_app_number] => 11484740
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/484740 | Semiconductor memory | Jul 11, 2006 | Issued |
Array
(
[id] => 5021198
[patent_doc_number] => 20070147164
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-06-28
[patent_title] => 'Row decoder for preventing leakage current and semiconductor memory device including the same'
[patent_app_type] => utility
[patent_app_number] => 11/484176
[patent_app_country] => US
[patent_app_date] => 2006-07-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3852
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0147/20070147164.pdf
[firstpage_image] =>[orig_patent_app_number] => 11484176
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/484176 | Row decoder for preventing leakage current and semiconductor memory device including the same | Jul 10, 2006 | Issued |
Array
(
[id] => 5153101
[patent_doc_number] => 20070035983
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-02-15
[patent_title] => 'Ferroelectric random access memory device and method for controlling writing sections therefor'
[patent_app_type] => utility
[patent_app_number] => 11/484280
[patent_app_country] => US
[patent_app_date] => 2006-07-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5534
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0035/20070035983.pdf
[firstpage_image] =>[orig_patent_app_number] => 11484280
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/484280 | Ferroelectric random access memory device and method for controlling writing sections therefor | Jul 10, 2006 | Abandoned |
Array
(
[id] => 5074187
[patent_doc_number] => 20070014162
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-01-18
[patent_title] => 'Nonvolatile memory device including circuit formed of thin film transistors'
[patent_app_type] => utility
[patent_app_number] => 11/482019
[patent_app_country] => US
[patent_app_date] => 2006-07-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 12457
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0014/20070014162.pdf
[firstpage_image] =>[orig_patent_app_number] => 11482019
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/482019 | Nonvolatile memory device including circuit formed of thin film transistors | Jul 6, 2006 | Issued |
Array
(
[id] => 402869
[patent_doc_number] => 07292496
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-11-06
[patent_title] => 'Semiconductor memory circuit'
[patent_app_type] => utility
[patent_app_number] => 11/472252
[patent_app_country] => US
[patent_app_date] => 2006-06-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 34
[patent_figures_cnt] => 44
[patent_no_of_words] => 16922
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/292/07292496.pdf
[firstpage_image] =>[orig_patent_app_number] => 11472252
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/472252 | Semiconductor memory circuit | Jun 21, 2006 | Issued |
Array
(
[id] => 5600779
[patent_doc_number] => 20060291124
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-12-28
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => utility
[patent_app_number] => 11/472360
[patent_app_country] => US
[patent_app_date] => 2006-06-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 6516
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0291/20060291124.pdf
[firstpage_image] =>[orig_patent_app_number] => 11472360
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/472360 | Semiconductor memory device | Jun 21, 2006 | Issued |
Array
(
[id] => 5257890
[patent_doc_number] => 20070211522
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-09-13
[patent_title] => 'Magnetic random access memory'
[patent_app_type] => utility
[patent_app_number] => 11/455644
[patent_app_country] => US
[patent_app_date] => 2006-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 25
[patent_no_of_words] => 8129
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0211/20070211522.pdf
[firstpage_image] =>[orig_patent_app_number] => 11455644
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/455644 | Magnetic random access memory | Jun 19, 2006 | Abandoned |
Array
(
[id] => 5641522
[patent_doc_number] => 20060279977
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-12-14
[patent_title] => 'Ferroelectric memory device having ferroelectric capacitor'
[patent_app_type] => utility
[patent_app_number] => 11/447940
[patent_app_country] => US
[patent_app_date] => 2006-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 10469
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0279/20060279977.pdf
[firstpage_image] =>[orig_patent_app_number] => 11447940
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/447940 | Ferroelectric memory device having ferroelectric capacitor | Jun 6, 2006 | Issued |
Array
(
[id] => 5283627
[patent_doc_number] => 20090097301
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-04-16
[patent_title] => 'SEMICONDUCTOR STORAGE APPARATUS AND SEMICONDUCTOR INTEGRATED CIRCUIT INCORPORATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 11/915816
[patent_app_country] => US
[patent_app_date] => 2006-05-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4459
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0097/20090097301.pdf
[firstpage_image] =>[orig_patent_app_number] => 11915816
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/915816 | SEMICONDUCTOR STORAGE APPARATUS AND SEMICONDUCTOR INTEGRATED CIRCUIT INCORPORATING THE SAME | May 17, 2006 | Abandoned |