
Trong Q. Phan
Examiner (ID: 14718, Phone: (571)272-1794 , Office: P/2825 )
| Most Active Art Unit | 2818 |
| Art Unit(s) | 2511, 2825, 2899, 2818, 2827, 2824, 2504 |
| Total Applications | 3077 |
| Issued Applications | 2717 |
| Pending Applications | 50 |
| Abandoned Applications | 311 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5752539
[patent_doc_number] => 20060221688
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-10-05
[patent_title] => 'Semiconductor integrated circuit and nonvolatile memory element'
[patent_app_type] => utility
[patent_app_number] => 11/432507
[patent_app_country] => US
[patent_app_date] => 2006-05-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 28
[patent_no_of_words] => 22456
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[pdf_file] => publications/A1/0221/20060221688.pdf
[firstpage_image] =>[orig_patent_app_number] => 11432507
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/432507 | Semiconductor integrated circuit and nonvolatile memory element | May 11, 2006 | Issued |
Array
(
[id] => 5919494
[patent_doc_number] => 20060239063
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-10-26
[patent_title] => 'Sensor adjusting circuit'
[patent_app_type] => utility
[patent_app_number] => 11/430975
[patent_app_country] => US
[patent_app_date] => 2006-05-10
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 11430975
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/430975 | Sensor adjusting circuit | May 9, 2006 | Issued |
Array
(
[id] => 798574
[patent_doc_number] => 07428167
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-09-23
[patent_title] => 'Semiconductor integrated circuit and nonvolatile memory element'
[patent_app_type] => utility
[patent_app_number] => 11/430039
[patent_app_country] => US
[patent_app_date] => 2006-05-09
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[patent_drawing_sheets_cnt] => 27
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[pdf_file] => patents/07/428/07428167.pdf
[firstpage_image] =>[orig_patent_app_number] => 11430039
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/430039 | Semiconductor integrated circuit and nonvolatile memory element | May 8, 2006 | Issued |
Array
(
[id] => 5681908
[patent_doc_number] => 20060198178
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-09-07
[patent_title] => 'Memory stacking system and method'
[patent_app_type] => utility
[patent_app_number] => 11/413793
[patent_app_country] => US
[patent_app_date] => 2006-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 4781
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[pdf_file] => publications/A1/0198/20060198178.pdf
[firstpage_image] =>[orig_patent_app_number] => 11413793
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/413793 | Memory stacking system and method | Apr 27, 2006 | Issued |
Array
(
[id] => 5607100
[patent_doc_number] => 20060268616
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-11-30
[patent_title] => 'FUSE MEMORY CELL WITH IMPROVED PROTECTION AGAINST UNAUTHORIZED ACCESS'
[patent_app_type] => utility
[patent_app_number] => 11/380640
[patent_app_country] => US
[patent_app_date] => 2006-04-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[pdf_file] => publications/A1/0268/20060268616.pdf
[firstpage_image] =>[orig_patent_app_number] => 11380640
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/380640 | Fuse memory cell with improved protection against unauthorized access | Apr 26, 2006 | Issued |
Array
(
[id] => 5641567
[patent_doc_number] => 20060280022
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-12-14
[patent_title] => 'Nonvolatile semiconductor memory device having assist gate'
[patent_app_type] => utility
[patent_app_number] => 11/411938
[patent_app_country] => US
[patent_app_date] => 2006-04-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 40
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[pdf_file] => publications/A1/0280/20060280022.pdf
[firstpage_image] =>[orig_patent_app_number] => 11411938
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/411938 | Nonvolatile semiconductor memory device having assist gate | Apr 26, 2006 | Issued |
Array
(
[id] => 5445269
[patent_doc_number] => 20090046495
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-02-19
[patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 11/913490
[patent_app_country] => US
[patent_app_date] => 2006-04-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 29
[patent_no_of_words] => 34040
[patent_no_of_claims] => 33
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0046/20090046495.pdf
[firstpage_image] =>[orig_patent_app_number] => 11913490
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/913490 | Nonvolatile semiconductor memory device | Apr 25, 2006 | Issued |
Array
(
[id] => 402870
[patent_doc_number] => 07292497
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-11-06
[patent_title] => 'Multi-bank memory'
[patent_app_type] => utility
[patent_app_number] => 11/379194
[patent_app_country] => US
[patent_app_date] => 2006-04-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 2992
[patent_no_of_claims] => 59
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/292/07292497.pdf
[firstpage_image] =>[orig_patent_app_number] => 11379194
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/379194 | Multi-bank memory | Apr 17, 2006 | Issued |
Array
(
[id] => 5321656
[patent_doc_number] => 20090059646
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-03-05
[patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 11/912184
[patent_app_country] => US
[patent_app_date] => 2006-04-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
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[pdf_file] => publications/A1/0059/20090059646.pdf
[firstpage_image] =>[orig_patent_app_number] => 11912184
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/912184 | Semiconductor integrated circuit | Apr 12, 2006 | Issued |
Array
(
[id] => 5269983
[patent_doc_number] => 20090073759
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-03-19
[patent_title] => 'Device for protecting a memory against attacks by error injection'
[patent_app_type] => utility
[patent_app_number] => 11/920176
[patent_app_country] => US
[patent_app_date] => 2006-03-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[pdf_file] => publications/A1/0073/20090073759.pdf
[firstpage_image] =>[orig_patent_app_number] => 11920176
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/920176 | Device for protecting a memory against attacks by error injection | Mar 30, 2006 | Issued |
Array
(
[id] => 4996165
[patent_doc_number] => 20070011510
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-01-11
[patent_title] => 'Semiconductor memory component and method for testing semiconductor memory components having a restricted memory area (partial good memories)'
[patent_app_type] => utility
[patent_app_number] => 11/375994
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[pdf_file] => publications/A1/0011/20070011510.pdf
[firstpage_image] =>[orig_patent_app_number] => 11375994
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/375994 | Semiconductor memory component and method for testing semiconductor memory components having a restricted memory area (partial good memories) | Mar 14, 2006 | Issued |
Array
(
[id] => 924009
[patent_doc_number] => 07319619
[patent_country] => US
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[patent_issue_date] => 2008-01-15
[patent_title] => 'Programmable logic device memory blocks with adjustable timing'
[patent_app_type] => utility
[patent_app_number] => 11/357629
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[pdf_file] => patents/07/319/07319619.pdf
[firstpage_image] =>[orig_patent_app_number] => 11357629
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/357629 | Programmable logic device memory blocks with adjustable timing | Feb 15, 2006 | Issued |
Array
(
[id] => 5671404
[patent_doc_number] => 20060176758
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-08-10
[patent_title] => 'Semiconductor memory devices having negatively biased sub word line scheme and methods of driving the same'
[patent_app_type] => utility
[patent_app_number] => 11/344018
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[firstpage_image] =>[orig_patent_app_number] => 11344018
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/344018 | Semiconductor memory devices having negatively biased sub word line scheme and methods of driving the same | Jan 30, 2006 | Issued |
Array
(
[id] => 5624088
[patent_doc_number] => 20060262593
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[patent_title] => 'Magnetic memory composition and method of manufacture'
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[pdf_file] => publications/A1/0262/20060262593.pdf
[firstpage_image] =>[orig_patent_app_number] => 11343214
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/343214 | Magnetic memory composition and method of manufacture | Jan 30, 2006 | Abandoned |
Array
(
[id] => 5251790
[patent_doc_number] => 20070133246
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[patent_issue_date] => 2007-06-14
[patent_title] => 'Semiconductor memory apparatus'
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Array
(
[id] => 926332
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[patent_title] => 'Non-volatile memory storage device and controller therefor'
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[firstpage_image] =>[orig_patent_app_number] => 11341682
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/341682 | Non-volatile memory storage device and controller therefor | Jan 29, 2006 | Issued |
Array
(
[id] => 5618168
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[patent_title] => 'Integrated semiconductor memory with an arrangement of nonvolatile memory cells, and method'
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[pdf_file] => publications/A1/0187/20060187701.pdf
[firstpage_image] =>[orig_patent_app_number] => 11341902
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/341902 | Integrated semiconductor memory with an arrangement of nonvolatile memory cells, and method | Jan 26, 2006 | Issued |
Array
(
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Array
(
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Array
(
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[pdf_file] => publications/A1/0133/20060133152.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/339399 | Method for programming and erasing an NROM cell | Jan 24, 2006 | Issued |