Search

Trong Q. Phan

Examiner (ID: 14718, Phone: (571)272-1794 , Office: P/2825 )

Most Active Art Unit
2818
Art Unit(s)
2511, 2825, 2899, 2818, 2827, 2824, 2504
Total Applications
3077
Issued Applications
2717
Pending Applications
50
Abandoned Applications
311

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 419628 [patent_doc_number] => 07277306 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-02 [patent_title] => 'Associative memory capable of searching for data while keeping high data reliability' [patent_app_type] => utility [patent_app_number] => 11/148320 [patent_app_country] => US [patent_app_date] => 2005-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 9237 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/277/07277306.pdf [firstpage_image] =>[orig_patent_app_number] => 11148320 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/148320
Associative memory capable of searching for data while keeping high data reliability Jun 8, 2005 Issued
Array ( [id] => 6965105 [patent_doc_number] => 20050232002 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-20 [patent_title] => 'Magnetic random access memory' [patent_app_type] => utility [patent_app_number] => 11/147270 [patent_app_country] => US [patent_app_date] => 2005-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 137 [patent_figures_cnt] => 137 [patent_no_of_words] => 57790 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0232/20050232002.pdf [firstpage_image] =>[orig_patent_app_number] => 11147270 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/147270
Magnetic random access memory Jun 7, 2005 Issued
Array ( [id] => 437168 [patent_doc_number] => 07263016 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-08-28 [patent_title] => 'Method and system for pre-charging and biasing a latch-type sense amplifier' [patent_app_type] => utility [patent_app_number] => 11/147790 [patent_app_country] => US [patent_app_date] => 2005-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3134 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/263/07263016.pdf [firstpage_image] =>[orig_patent_app_number] => 11147790 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/147790
Method and system for pre-charging and biasing a latch-type sense amplifier Jun 6, 2005 Issued
Array ( [id] => 800985 [patent_doc_number] => 07426138 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-09-16 [patent_title] => 'Parallel programming of multiple-bit-per-cell memory cells by controlling program pulsewidth and programming voltage' [patent_app_type] => utility [patent_app_number] => 11/135747 [patent_app_country] => US [patent_app_date] => 2005-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 26 [patent_no_of_words] => 13786 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/426/07426138.pdf [firstpage_image] =>[orig_patent_app_number] => 11135747 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/135747
Parallel programming of multiple-bit-per-cell memory cells by controlling program pulsewidth and programming voltage May 23, 2005 Issued
Array ( [id] => 556927 [patent_doc_number] => 07170782 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-30 [patent_title] => 'Method and structure for efficient data verification operation for non-volatile memories' [patent_app_type] => utility [patent_app_number] => 11/125644 [patent_app_country] => US [patent_app_date] => 2005-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 9494 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/170/07170782.pdf [firstpage_image] =>[orig_patent_app_number] => 11125644 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/125644
Method and structure for efficient data verification operation for non-volatile memories May 8, 2005 Issued
Array ( [id] => 5864384 [patent_doc_number] => 20060098514 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-11 [patent_title] => 'Circuit for controlling differential amplifiers in semiconductor memory devices' [patent_app_type] => utility [patent_app_number] => 11/122692 [patent_app_country] => US [patent_app_date] => 2005-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2952 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20060098514.pdf [firstpage_image] =>[orig_patent_app_number] => 11122692 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/122692
Circuit for controlling differential amplifiers in semiconductor memory devices May 4, 2005 Issued
Array ( [id] => 554407 [patent_doc_number] => 07167394 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-23 [patent_title] => 'Sense amplifier for reading a cell of a non-volatile memory device' [patent_app_type] => utility [patent_app_number] => 11/121616 [patent_app_country] => US [patent_app_date] => 2005-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2417 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/167/07167394.pdf [firstpage_image] =>[orig_patent_app_number] => 11121616 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/121616
Sense amplifier for reading a cell of a non-volatile memory device May 3, 2005 Issued
Array ( [id] => 5660257 [patent_doc_number] => 20060250853 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-09 [patent_title] => 'Method and apparatus for sensing flash memory using delta sigma modulation' [patent_app_type] => utility [patent_app_number] => 11/121114 [patent_app_country] => US [patent_app_date] => 2005-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3564 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0250/20060250853.pdf [firstpage_image] =>[orig_patent_app_number] => 11121114 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/121114
Method and apparatus for sensing flash memory using delta sigma modulation May 3, 2005 Issued
Array ( [id] => 5665890 [patent_doc_number] => 20060171240 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-03 [patent_title] => 'Bitline selection circuitry for nonvolatile memories' [patent_app_type] => utility [patent_app_number] => 11/120894 [patent_app_country] => US [patent_app_date] => 2005-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2804 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0171/20060171240.pdf [firstpage_image] =>[orig_patent_app_number] => 11120894 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/120894
Bitline selection circuitry for nonvolatile memories May 2, 2005 Abandoned
Array ( [id] => 449075 [patent_doc_number] => 07254062 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-07 [patent_title] => 'Circuit for selecting/deselecting a bitline of a non-volatile memory' [patent_app_type] => utility [patent_app_number] => 11/120766 [patent_app_country] => US [patent_app_date] => 2005-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1838 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/254/07254062.pdf [firstpage_image] =>[orig_patent_app_number] => 11120766 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/120766
Circuit for selecting/deselecting a bitline of a non-volatile memory May 2, 2005 Issued
Array ( [id] => 5833403 [patent_doc_number] => 20060245233 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-02 [patent_title] => 'Multi-bit virtual-ground NAND memory device' [patent_app_type] => utility [patent_app_number] => 11/119376 [patent_app_country] => US [patent_app_date] => 2005-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5330 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0245/20060245233.pdf [firstpage_image] =>[orig_patent_app_number] => 11119376 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/119376
Multi-bit virtual-ground NAND memory device Apr 28, 2005 Issued
Array ( [id] => 478661 [patent_doc_number] => 07227799 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-06-05 [patent_title] => 'Sense amplifier for eliminating leakage current due to bit line shorts' [patent_app_type] => utility [patent_app_number] => 11/118036 [patent_app_country] => US [patent_app_date] => 2005-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 6000 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/227/07227799.pdf [firstpage_image] =>[orig_patent_app_number] => 11118036 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/118036
Sense amplifier for eliminating leakage current due to bit line shorts Apr 28, 2005 Issued
Array ( [id] => 342490 [patent_doc_number] => 07502248 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-03-10 [patent_title] => 'Multi-bit magnetic random access memory device' [patent_app_type] => utility [patent_app_number] => 11/117352 [patent_app_country] => US [patent_app_date] => 2005-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 6999 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/502/07502248.pdf [firstpage_image] =>[orig_patent_app_number] => 11117352 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/117352
Multi-bit magnetic random access memory device Apr 28, 2005 Issued
Array ( [id] => 5833410 [patent_doc_number] => 20060245240 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-02 [patent_title] => 'Method and apparatus for reducing time delay through static bitlines of a static memory' [patent_app_type] => utility [patent_app_number] => 11/117144 [patent_app_country] => US [patent_app_date] => 2005-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4495 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0245/20060245240.pdf [firstpage_image] =>[orig_patent_app_number] => 11117144 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/117144
Method and apparatus for reducing time delay through static bitlines of a static memory Apr 27, 2005 Abandoned
Array ( [id] => 478615 [patent_doc_number] => 07227783 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-06-05 [patent_title] => 'Memory structure and method of programming' [patent_app_type] => utility [patent_app_number] => 11/116614 [patent_app_country] => US [patent_app_date] => 2005-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 7194 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/227/07227783.pdf [firstpage_image] =>[orig_patent_app_number] => 11116614 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/116614
Memory structure and method of programming Apr 27, 2005 Issued
Array ( [id] => 360651 [patent_doc_number] => 07486530 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-03 [patent_title] => 'Method of comparison between cache and data register for non-volatile memory' [patent_app_type] => utility [patent_app_number] => 11/116842 [patent_app_country] => US [patent_app_date] => 2005-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 5581 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/486/07486530.pdf [firstpage_image] =>[orig_patent_app_number] => 11116842 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/116842
Method of comparison between cache and data register for non-volatile memory Apr 27, 2005 Issued
Array ( [id] => 684176 [patent_doc_number] => 07082047 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-25 [patent_title] => 'Ferroelectric memory input/output apparatus' [patent_app_type] => utility [patent_app_number] => 11/109197 [patent_app_country] => US [patent_app_date] => 2005-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4191 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/082/07082047.pdf [firstpage_image] =>[orig_patent_app_number] => 11109197 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/109197
Ferroelectric memory input/output apparatus Apr 17, 2005 Issued
Array ( [id] => 6911112 [patent_doc_number] => 20050174870 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-11 [patent_title] => 'SRAM device' [patent_app_type] => utility [patent_app_number] => 11/101467 [patent_app_country] => US [patent_app_date] => 2005-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3673 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20050174870.pdf [firstpage_image] =>[orig_patent_app_number] => 11101467 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/101467
SRAM device Apr 7, 2005 Abandoned
Array ( [id] => 5758647 [patent_doc_number] => 20060209592 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-21 [patent_title] => 'Non-volatile memory and method with power-saving read and program-verify operations' [patent_app_type] => utility [patent_app_number] => 11/083514 [patent_app_country] => US [patent_app_date] => 2005-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 16462 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0209/20060209592.pdf [firstpage_image] =>[orig_patent_app_number] => 11083514 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/083514
Non-volatile memory and method with power-saving read and program-verify operations Mar 15, 2005 Issued
Array ( [id] => 741581 [patent_doc_number] => 07035163 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-25 [patent_title] => 'Asynchronously-resettable decoder with redundancy' [patent_app_type] => utility [patent_app_number] => 11/058154 [patent_app_country] => US [patent_app_date] => 2005-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 24 [patent_no_of_words] => 17030 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/035/07035163.pdf [firstpage_image] =>[orig_patent_app_number] => 11058154 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/058154
Asynchronously-resettable decoder with redundancy Feb 14, 2005 Issued
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