Search

Trong Q. Phan

Examiner (ID: 14718, Phone: (571)272-1794 , Office: P/2825 )

Most Active Art Unit
2818
Art Unit(s)
2511, 2825, 2899, 2818, 2827, 2824, 2504
Total Applications
3077
Issued Applications
2717
Pending Applications
50
Abandoned Applications
311

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5737350 [patent_doc_number] => 20060007740 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-12 [patent_title] => 'NON-VOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 10/883698 [patent_app_country] => US [patent_app_date] => 2004-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 11249 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20060007740.pdf [firstpage_image] =>[orig_patent_app_number] => 10883698 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/883698
Non-volatile memory device Jul 5, 2004 Issued
Array ( [id] => 6969663 [patent_doc_number] => 20050035373 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-17 [patent_title] => 'Storage device' [patent_app_type] => utility [patent_app_number] => 10/883922 [patent_app_country] => US [patent_app_date] => 2004-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 21810 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0035/20050035373.pdf [firstpage_image] =>[orig_patent_app_number] => 10883922 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/883922
Storage device Jul 1, 2004 Issued
Array ( [id] => 7087730 [patent_doc_number] => 20050007842 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-13 [patent_title] => 'Amplifying circuit, amplifying apparatus, and memory apparatus' [patent_app_type] => utility [patent_app_number] => 10/883882 [patent_app_country] => US [patent_app_date] => 2004-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3164 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20050007842.pdf [firstpage_image] =>[orig_patent_app_number] => 10883882 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/883882
Amplifying circuit, amplifying apparatus, and memory apparatus Jul 1, 2004 Abandoned
Array ( [id] => 678374 [patent_doc_number] => 07088605 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-08 [patent_title] => 'FeRAM memory design using ROM array architecture' [patent_app_type] => utility [patent_app_number] => 10/884290 [patent_app_country] => US [patent_app_date] => 2004-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3194 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/088/07088605.pdf [firstpage_image] =>[orig_patent_app_number] => 10884290 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/884290
FeRAM memory design using ROM array architecture Jul 1, 2004 Issued
Array ( [id] => 7211507 [patent_doc_number] => 20050259489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-24 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 10/882354 [patent_app_country] => US [patent_app_date] => 2004-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7704 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0259/20050259489.pdf [firstpage_image] =>[orig_patent_app_number] => 10882354 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/882354
Semiconductor memory device Jul 1, 2004 Issued
Array ( [id] => 338950 [patent_doc_number] => 07505295 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-03-17 [patent_title] => 'Content addressable memory with multi-row write function' [patent_app_type] => utility [patent_app_number] => 10/883160 [patent_app_country] => US [patent_app_date] => 2004-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 9792 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/505/07505295.pdf [firstpage_image] =>[orig_patent_app_number] => 10883160 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/883160
Content addressable memory with multi-row write function Jun 30, 2004 Issued
Array ( [id] => 923961 [patent_doc_number] => 07319602 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-01-15 [patent_title] => 'Content addressable memory with twisted data lines' [patent_app_type] => utility [patent_app_number] => 10/883158 [patent_app_country] => US [patent_app_date] => 2004-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 28 [patent_no_of_words] => 16384 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/319/07319602.pdf [firstpage_image] =>[orig_patent_app_number] => 10883158 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/883158
Content addressable memory with twisted data lines Jun 30, 2004 Issued
Array ( [id] => 850455 [patent_doc_number] => 07382671 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-06-03 [patent_title] => 'Method for detecting column fail by controlling sense amplifier of memory device' [patent_app_type] => utility [patent_app_number] => 10/882442 [patent_app_country] => US [patent_app_date] => 2004-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3396 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/382/07382671.pdf [firstpage_image] =>[orig_patent_app_number] => 10882442 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/882442
Method for detecting column fail by controlling sense amplifier of memory device Jun 30, 2004 Issued
Array ( [id] => 6970659 [patent_doc_number] => 20050036369 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-17 [patent_title] => 'Temperature compensated bit-line precharge' [patent_app_type] => utility [patent_app_number] => 10/884152 [patent_app_country] => US [patent_app_date] => 2004-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3494 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20050036369.pdf [firstpage_image] =>[orig_patent_app_number] => 10884152 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/884152
Temperature compensated bit-line precharge Jun 30, 2004 Issued
Array ( [id] => 7059865 [patent_doc_number] => 20050002225 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-06 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 10/879753 [patent_app_country] => US [patent_app_date] => 2004-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6093 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20050002225.pdf [firstpage_image] =>[orig_patent_app_number] => 10879753 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/879753
Semiconductor memory device Jun 29, 2004 Issued
Array ( [id] => 547640 [patent_doc_number] => 07177206 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-02-13 [patent_title] => 'Power supply circuit for delay locked loop and its method' [patent_app_type] => utility [patent_app_number] => 10/882454 [patent_app_country] => US [patent_app_date] => 2004-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 3951 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/177/07177206.pdf [firstpage_image] =>[orig_patent_app_number] => 10882454 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/882454
Power supply circuit for delay locked loop and its method Jun 29, 2004 Issued
Array ( [id] => 617825 [patent_doc_number] => 07145790 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-12-05 [patent_title] => 'Phase change resistor cell and nonvolatile memory device using the same' [patent_app_type] => utility [patent_app_number] => 10/879517 [patent_app_country] => US [patent_app_date] => 2004-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 3662 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/145/07145790.pdf [firstpage_image] =>[orig_patent_app_number] => 10879517 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/879517
Phase change resistor cell and nonvolatile memory device using the same Jun 29, 2004 Issued
Array ( [id] => 6943617 [patent_doc_number] => 20050195666 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-08 [patent_title] => 'Memory device including parallel test circuit' [patent_app_type] => utility [patent_app_number] => 10/879175 [patent_app_country] => US [patent_app_date] => 2004-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2345 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0195/20050195666.pdf [firstpage_image] =>[orig_patent_app_number] => 10879175 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/879175
Memory device including parallel test circuit Jun 29, 2004 Issued
Array ( [id] => 858839 [patent_doc_number] => 07376035 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-20 [patent_title] => 'Semiconductor memory device for performing refresh operation and refresh method thereof' [patent_app_type] => utility [patent_app_number] => 10/879181 [patent_app_country] => US [patent_app_date] => 2004-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2294 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 325 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/376/07376035.pdf [firstpage_image] =>[orig_patent_app_number] => 10879181 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/879181
Semiconductor memory device for performing refresh operation and refresh method thereof Jun 29, 2004 Issued
Array ( [id] => 7245280 [patent_doc_number] => 20050141258 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-30 [patent_title] => 'FeRAM for high speed sensing' [patent_app_type] => utility [patent_app_number] => 10/879121 [patent_app_country] => US [patent_app_date] => 2004-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4754 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0141/20050141258.pdf [firstpage_image] =>[orig_patent_app_number] => 10879121 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/879121
FeRAM for high speed sensing Jun 29, 2004 Issued
Array ( [id] => 1051663 [patent_doc_number] => 06862216 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-03-01 [patent_title] => 'Non-volatile memory cell with gated diode and MOS transistor and method for using such cell' [patent_app_type] => utility [patent_app_number] => 10/880176 [patent_app_country] => US [patent_app_date] => 2004-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 4154 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/862/06862216.pdf [firstpage_image] =>[orig_patent_app_number] => 10880176 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/880176
Non-volatile memory cell with gated diode and MOS transistor and method for using such cell Jun 28, 2004 Issued
Array ( [id] => 7141766 [patent_doc_number] => 20050117434 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-02 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 10/879769 [patent_app_country] => US [patent_app_date] => 2004-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3070 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20050117434.pdf [firstpage_image] =>[orig_patent_app_number] => 10879769 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/879769
Semiconductor memory device Jun 27, 2004 Issued
Array ( [id] => 891354 [patent_doc_number] => RE040147 [patent_country] => US [patent_kind] => E1 [patent_issue_date] => 2008-03-11 [patent_title] => 'Memory card device including a clock generator' [patent_app_type] => reissue [patent_app_number] => 10/869675 [patent_app_country] => US [patent_app_date] => 2004-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4835 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/040/RE040147.pdf [firstpage_image] =>[orig_patent_app_number] => 10869675 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/869675
Memory card device including a clock generator Jun 16, 2004 Issued
Array ( [id] => 969832 [patent_doc_number] => 06940743 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-09-06 [patent_title] => 'Semiconductor memory devices for outputting bit cell data without separate reference voltage generator and related methods of outputting bit cell data' [patent_app_type] => utility [patent_app_number] => 10/864276 [patent_app_country] => US [patent_app_date] => 2004-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5607 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/940/06940743.pdf [firstpage_image] =>[orig_patent_app_number] => 10864276 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/864276
Semiconductor memory devices for outputting bit cell data without separate reference voltage generator and related methods of outputting bit cell data Jun 8, 2004 Issued
Array ( [id] => 1084394 [patent_doc_number] => 06834012 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-12-21 [patent_title] => 'Memory device and methods of using negative gate stress to correct over-erased memory cells' [patent_app_type] => B1 [patent_app_number] => 10/863673 [patent_app_country] => US [patent_app_date] => 2004-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7372 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/834/06834012.pdf [firstpage_image] =>[orig_patent_app_number] => 10863673 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/863673
Memory device and methods of using negative gate stress to correct over-erased memory cells Jun 7, 2004 Issued
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