
Trong Q. Phan
Examiner (ID: 14718, Phone: (571)272-1794 , Office: P/2825 )
| Most Active Art Unit | 2818 |
| Art Unit(s) | 2511, 2825, 2899, 2818, 2827, 2824, 2504 |
| Total Applications | 3077 |
| Issued Applications | 2717 |
| Pending Applications | 50 |
| Abandoned Applications | 311 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 784524
[patent_doc_number] => 06992917
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-01-31
[patent_title] => 'Integrated circuit with reduced body effect sensitivity'
[patent_app_type] => utility
[patent_app_number] => 10/736414
[patent_app_country] => US
[patent_app_date] => 2003-12-15
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/736414 | Integrated circuit with reduced body effect sensitivity | Dec 14, 2003 | Issued |
Array
(
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[patent_doc_number] => 06859391
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[patent_kind] => B1
[patent_issue_date] => 2005-02-22
[patent_title] => 'EEPROM architecture and programming protocol'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/737676 | EEPROM architecture and programming protocol | Dec 14, 2003 | Issued |
Array
(
[id] => 7451683
[patent_doc_number] => 20040196726
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[patent_issue_date] => 2004-10-07
[patent_title] => 'Dense content addressable memory cell'
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Array
(
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[patent_issue_date] => 2007-04-03
[patent_title] => 'Semiconductor memory device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/733270 | Semiconductor memory device | Dec 11, 2003 | Issued |
Array
(
[id] => 383952
[patent_doc_number] => 07307907
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[patent_issue_date] => 2007-12-11
[patent_title] => 'SRAM device and a method of operating the same to reduce leakage current during a sleep mode'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/732970 | SRAM device and a method of operating the same to reduce leakage current during a sleep mode | Dec 10, 2003 | Issued |
Array
(
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[patent_doc_number] => 06894934
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[patent_issue_date] => 2005-05-17
[patent_title] => 'Non-volatile memory cell sensing circuit, particularly for low power supply voltages and high capacitive load values'
[patent_app_type] => utility
[patent_app_number] => 10/728372
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/728372 | Non-volatile memory cell sensing circuit, particularly for low power supply voltages and high capacitive load values | Dec 3, 2003 | Issued |
Array
(
[id] => 710465
[patent_doc_number] => 07061790
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[patent_issue_date] => 2006-06-13
[patent_title] => 'Semiconductor memory device and data write method'
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[patent_app_country] => US
[patent_app_date] => 2003-12-03
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[firstpage_image] =>[orig_patent_app_number] => 10728176
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/728176 | Semiconductor memory device and data write method | Dec 2, 2003 | Issued |
Array
(
[id] => 7287915
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[patent_country] => US
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[patent_issue_date] => 2004-06-10
[patent_title] => 'Method of marginal erasure for the testing of flash memories'
[patent_app_type] => new
[patent_app_number] => 10/725809
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 10725809
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/725809 | Method of marginal erasure for the testing of flash memories | Dec 1, 2003 | Issued |
Array
(
[id] => 7320543
[patent_doc_number] => 20040136250
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-07-15
[patent_title] => 'Semiconductor memory device with improved precharge timing'
[patent_app_type] => new
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/725776 | Semiconductor memory device with improved precharge timing | Nov 30, 2003 | Issued |
Array
(
[id] => 768606
[patent_doc_number] => 07009893
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[patent_kind] => B2
[patent_issue_date] => 2006-03-07
[patent_title] => 'Range selectable address decoder and frame memory device for processing graphic data at high speed using the same'
[patent_app_type] => utility
[patent_app_number] => 10/717459
[patent_app_country] => US
[patent_app_date] => 2003-11-21
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/717459 | Range selectable address decoder and frame memory device for processing graphic data at high speed using the same | Nov 20, 2003 | Issued |
Array
(
[id] => 7379937
[patent_doc_number] => 20040179385
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[patent_issue_date] => 2004-09-16
[patent_title] => 'Ferroelectric memory and method of testing the same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/716565 | Ferroelectric memory and method of testing the same | Nov 19, 2003 | Issued |
Array
(
[id] => 944823
[patent_doc_number] => 06967879
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[patent_title] => 'Memory trouble relief circuit'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/716876 | Memory trouble relief circuit | Nov 19, 2003 | Issued |
Array
(
[id] => 7331153
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[patent_title] => 'Circuit and method for transforming data input/output format in parallel bit test'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/716773 | Circuit and method for transforming data input/output format in parallel bit test | Nov 18, 2003 | Issued |
Array
(
[id] => 433654
[patent_doc_number] => 07266031
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[patent_title] => 'Internal voltage generator with temperature control'
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Array
(
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Array
(
[id] => 713926
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[patent_title] => 'Magnetic memory array configuration'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/699155 | Magnetic memory array configuration | Oct 30, 2003 | Issued |
Array
(
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Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/695572 | Sensor compensation for environmental variations for magnetic random access memory | Oct 27, 2003 | Issued |