Search

Trong Q. Phan

Examiner (ID: 14718, Phone: (571)272-1794 , Office: P/2825 )

Most Active Art Unit
2818
Art Unit(s)
2511, 2825, 2899, 2818, 2827, 2824, 2504
Total Applications
3077
Issued Applications
2717
Pending Applications
50
Abandoned Applications
311

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7338176 [patent_doc_number] => 20040190343 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-30 [patent_title] => 'Nonvolatile memories with asymmetric transistors, nonvolatile memories with high voltage lines extending in the column direction, and nonvolatile memories with decoding circuits sharing a common area' [patent_app_type] => new [patent_app_number] => 10/397478 [patent_app_country] => US [patent_app_date] => 2003-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 9587 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0190/20040190343.pdf [firstpage_image] =>[orig_patent_app_number] => 10397478 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/397478
Nonvolatile memories with asymmetric transistors, nonvolatile memories with high voltage lines extending in the column direction, and nonvolatile memories with decoding circuits sharing a common area Mar 24, 2003 Issued
Array ( [id] => 788761 [patent_doc_number] => 06987695 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-17 [patent_title] => 'Writing data to nonvolatile memory' [patent_app_type] => utility [patent_app_number] => 10/397882 [patent_app_country] => US [patent_app_date] => 2003-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2999 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/987/06987695.pdf [firstpage_image] =>[orig_patent_app_number] => 10397882 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/397882
Writing data to nonvolatile memory Mar 24, 2003 Issued
Array ( [id] => 7195513 [patent_doc_number] => 20040085824 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-06 [patent_title] => 'Program counter circuit' [patent_app_type] => new [patent_app_number] => 10/394268 [patent_app_country] => US [patent_app_date] => 2003-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5378 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 324 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0085/20040085824.pdf [firstpage_image] =>[orig_patent_app_number] => 10394268 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/394268
Program counter circuit Mar 23, 2003 Issued
Array ( [id] => 545362 [patent_doc_number] => 07173871 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-02-06 [patent_title] => 'Semiconductor memory device and method of outputting data strobe signal thereof' [patent_app_type] => utility [patent_app_number] => 10/392582 [patent_app_country] => US [patent_app_date] => 2003-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3794 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/173/07173871.pdf [firstpage_image] =>[orig_patent_app_number] => 10392582 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/392582
Semiconductor memory device and method of outputting data strobe signal thereof Mar 18, 2003 Issued
Array ( [id] => 7608819 [patent_doc_number] => 06999372 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-14 [patent_title] => 'Multi-ported memory cell' [patent_app_type] => utility [patent_app_number] => 10/391278 [patent_app_country] => US [patent_app_date] => 2003-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4704 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/999/06999372.pdf [firstpage_image] =>[orig_patent_app_number] => 10391278 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/391278
Multi-ported memory cell Mar 17, 2003 Issued
Array ( [id] => 7346738 [patent_doc_number] => 20040047215 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-11 [patent_title] => 'Bit line sense amplifier driving control circuits and methods for synchronous drams that selectively supply and suspend supply of operating voltages' [patent_app_type] => new [patent_app_number] => 10/389482 [patent_app_country] => US [patent_app_date] => 2003-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 13815 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0047/20040047215.pdf [firstpage_image] =>[orig_patent_app_number] => 10389482 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/389482
Bit line sense amplifier driving control circuits and methods for synchronous drams that selectively supply and suspend supply of operating voltages Mar 13, 2003 Issued
Array ( [id] => 7626088 [patent_doc_number] => 06768678 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-07-27 [patent_title] => 'Data sensing method used in a memory cell circuit' [patent_app_type] => B1 [patent_app_number] => 10/249076 [patent_app_country] => US [patent_app_date] => 2003-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 5892 [patent_no_of_claims] => 52 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 6 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/768/06768678.pdf [firstpage_image] =>[orig_patent_app_number] => 10249076 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/249076
Data sensing method used in a memory cell circuit Mar 13, 2003 Issued
Array ( [id] => 6657350 [patent_doc_number] => 20030133329 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-17 [patent_title] => 'Nonvolatile semiconductor storage device and method for operating the device' [patent_app_type] => new [patent_app_number] => 10/386660 [patent_app_country] => US [patent_app_date] => 2003-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 16570 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20030133329.pdf [firstpage_image] =>[orig_patent_app_number] => 10386660 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/386660
Nonvolatile semiconductor storage device and method for operating the device Mar 12, 2003 Issued
Array ( [id] => 1163642 [patent_doc_number] => 06765818 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-20 [patent_title] => 'Semiconductor memory having memory cells and device for controlling data written in the semiconductor memory' [patent_app_type] => B2 [patent_app_number] => 10/383577 [patent_app_country] => US [patent_app_date] => 2003-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 9191 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/765/06765818.pdf [firstpage_image] =>[orig_patent_app_number] => 10383577 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/383577
Semiconductor memory having memory cells and device for controlling data written in the semiconductor memory Mar 9, 2003 Issued
Array ( [id] => 1061314 [patent_doc_number] => 06853589 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-08 [patent_title] => 'Clock phase adjustment method, integrated circuit, and method for designing the integrated circuit' [patent_app_type] => utility [patent_app_number] => 10/383611 [patent_app_country] => US [patent_app_date] => 2003-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 19808 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/853/06853589.pdf [firstpage_image] =>[orig_patent_app_number] => 10383611 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/383611
Clock phase adjustment method, integrated circuit, and method for designing the integrated circuit Mar 9, 2003 Issued
Array ( [id] => 1199315 [patent_doc_number] => 06728138 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-27 [patent_title] => 'Semiconductor memory device having faulty cells' [patent_app_type] => B2 [patent_app_number] => 10/373872 [patent_app_country] => US [patent_app_date] => 2003-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 12738 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/728/06728138.pdf [firstpage_image] =>[orig_patent_app_number] => 10373872 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/373872
Semiconductor memory device having faulty cells Feb 26, 2003 Issued
Array ( [id] => 6808131 [patent_doc_number] => 20030198070 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-23 [patent_title] => 'Dense content addressable memory cell' [patent_app_type] => new [patent_app_number] => 10/375880 [patent_app_country] => US [patent_app_date] => 2003-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1702 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0198/20030198070.pdf [firstpage_image] =>[orig_patent_app_number] => 10375880 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/375880
Dense content addressable memory cell Feb 25, 2003 Issued
Array ( [id] => 7457470 [patent_doc_number] => 20040165462 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-26 [patent_title] => 'Low-voltage sense amplifier and method' [patent_app_type] => new [patent_app_number] => 10/374376 [patent_app_country] => US [patent_app_date] => 2003-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4271 [patent_no_of_claims] => 72 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0165/20040165462.pdf [firstpage_image] =>[orig_patent_app_number] => 10374376 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/374376
Low-voltage sense amplifier and method Feb 24, 2003 Issued
Array ( [id] => 7391603 [patent_doc_number] => 20040022110 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-05 [patent_title] => 'Semiconductor memory device storing redundant replacement information with small occupation area' [patent_app_type] => new [patent_app_number] => 10/372284 [patent_app_country] => US [patent_app_date] => 2003-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 16576 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0022/20040022110.pdf [firstpage_image] =>[orig_patent_app_number] => 10372284 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/372284
Semiconductor memory device storing redundant replacement information with small occupation area Feb 24, 2003 Issued
Array ( [id] => 7679280 [patent_doc_number] => 20030167372 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-04 [patent_title] => 'Semiconductor memory device with a flexible redundancy scheme' [patent_app_type] => new [patent_app_number] => 10/373410 [patent_app_country] => US [patent_app_date] => 2003-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4689 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0167/20030167372.pdf [firstpage_image] =>[orig_patent_app_number] => 10373410 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/373410
Semiconductor memory device with a flexible redundancy scheme Feb 23, 2003 Issued
Array ( [id] => 944822 [patent_doc_number] => 06967878 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-22 [patent_title] => 'Redundancy architecture for repairing semiconductor memories' [patent_app_type] => utility [patent_app_number] => 10/370578 [patent_app_country] => US [patent_app_date] => 2003-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 12250 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/967/06967878.pdf [firstpage_image] =>[orig_patent_app_number] => 10370578 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/370578
Redundancy architecture for repairing semiconductor memories Feb 23, 2003 Issued
Array ( [id] => 1176163 [patent_doc_number] => 06754120 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-22 [patent_title] => 'DRAM output circuitry supporting sequential data capture to reduce core access times' [patent_app_type] => B1 [patent_app_number] => 10/364178 [patent_app_country] => US [patent_app_date] => 2003-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2739 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/754/06754120.pdf [firstpage_image] =>[orig_patent_app_number] => 10364178 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/364178
DRAM output circuitry supporting sequential data capture to reduce core access times Feb 10, 2003 Issued
Array ( [id] => 7131841 [patent_doc_number] => 20040042291 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-04 [patent_title] => 'Thin film magnetic memory device with magnetic tunnel junction' [patent_app_type] => new [patent_app_number] => 10/361770 [patent_app_country] => US [patent_app_date] => 2003-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9234 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20040042291.pdf [firstpage_image] =>[orig_patent_app_number] => 10361770 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/361770
Thin film magnetic memory device with magnetic tunnel junction Feb 10, 2003 Issued
Array ( [id] => 7628753 [patent_doc_number] => 06819607 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-16 [patent_title] => 'Semiconductor memory device' [patent_app_type] => B2 [patent_app_number] => 10/360863 [patent_app_country] => US [patent_app_date] => 2003-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 23 [patent_no_of_words] => 25426 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 6 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/819/06819607.pdf [firstpage_image] =>[orig_patent_app_number] => 10360863 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/360863
Semiconductor memory device Feb 9, 2003 Issued
Array ( [id] => 6795682 [patent_doc_number] => 20030174555 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-18 [patent_title] => 'Novel method and structure for efficient data verification operation for non-volatile memories' [patent_app_type] => new [patent_app_number] => 10/360829 [patent_app_country] => US [patent_app_date] => 2003-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9538 [patent_no_of_claims] => 75 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20030174555.pdf [firstpage_image] =>[orig_patent_app_number] => 10360829 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/360829
Method and structure for efficient data verification operation for non-volatile memories Feb 6, 2003 Issued
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