Search

Trong Q. Phan

Examiner (ID: 14718, Phone: (571)272-1794 , Office: P/2825 )

Most Active Art Unit
2818
Art Unit(s)
2511, 2825, 2899, 2818, 2827, 2824, 2504
Total Applications
3077
Issued Applications
2717
Pending Applications
50
Abandoned Applications
311

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 409881 [patent_doc_number] => 07286383 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-10-23 [patent_title] => 'Bit line sharing and word line load reduction for low AC power SRAM architecture' [patent_app_type] => utility [patent_app_number] => 10/215676 [patent_app_country] => US [patent_app_date] => 2002-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 2584 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/286/07286383.pdf [firstpage_image] =>[orig_patent_app_number] => 10215676 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/215676
Bit line sharing and word line load reduction for low AC power SRAM architecture Aug 9, 2002 Issued
Array ( [id] => 1010413 [patent_doc_number] => 06901007 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-31 [patent_title] => 'Memory device with multi-level storage cells and apparatuses, systems and methods including same' [patent_app_type] => utility [patent_app_number] => 10/216080 [patent_app_country] => US [patent_app_date] => 2002-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 15286 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/901/06901007.pdf [firstpage_image] =>[orig_patent_app_number] => 10216080 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/216080
Memory device with multi-level storage cells and apparatuses, systems and methods including same Aug 6, 2002 Issued
Array ( [id] => 1194942 [patent_doc_number] => 06731558 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-05-04 [patent_title] => 'Semiconductor device' [patent_app_type] => B2 [patent_app_number] => 10/211377 [patent_app_country] => US [patent_app_date] => 2002-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 9163 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/731/06731558.pdf [firstpage_image] =>[orig_patent_app_number] => 10211377 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/211377
Semiconductor device Aug 4, 2002 Issued
Array ( [id] => 6841951 [patent_doc_number] => 20030147298 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-07 [patent_title] => 'Synchronous semiconductor memory device allowing control of operation mode in accordance with operation conditions of a system' [patent_app_type] => new [patent_app_number] => 10/209894 [patent_app_country] => US [patent_app_date] => 2002-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 47 [patent_figures_cnt] => 47 [patent_no_of_words] => 28856 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0147/20030147298.pdf [firstpage_image] =>[orig_patent_app_number] => 10209894 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/209894
Synchronous semiconductor memory device allowing control of operation mode in accordance with operation conditions of a system Aug 1, 2002 Issued
Array ( [id] => 6686857 [patent_doc_number] => 20030030580 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-13 [patent_title] => 'Analog to digital converter utilizing resolution enhancement' [patent_app_type] => new [patent_app_number] => 10/211024 [patent_app_country] => US [patent_app_date] => 2002-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3149 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20030030580.pdf [firstpage_image] =>[orig_patent_app_number] => 10211024 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/211024
Analog to digital converter utilizing resolution enhancement Jul 31, 2002 Abandoned
Array ( [id] => 1019825 [patent_doc_number] => 06891752 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-05-10 [patent_title] => 'System and method for erase voltage control during multiple sector erase of a flash memory device' [patent_app_type] => utility [patent_app_number] => 10/210378 [patent_app_country] => US [patent_app_date] => 2002-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6341 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/891/06891752.pdf [firstpage_image] =>[orig_patent_app_number] => 10210378 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/210378
System and method for erase voltage control during multiple sector erase of a flash memory device Jul 30, 2002 Issued
Array ( [id] => 6255624 [patent_doc_number] => 20020186040 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-12 [patent_title] => 'Semiconductor logic circuit device of low current consumption' [patent_app_type] => new [patent_app_number] => 10/206879 [patent_app_country] => US [patent_app_date] => 2002-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 18997 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0186/20020186040.pdf [firstpage_image] =>[orig_patent_app_number] => 10206879 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/206879
Semiconductor logic circuit device of low current consumption Jul 28, 2002 Issued
Array ( [id] => 973948 [patent_doc_number] => 06937517 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-30 [patent_title] => 'Clock regulation scheme for varying loads' [patent_app_type] => utility [patent_app_number] => 10/197782 [patent_app_country] => US [patent_app_date] => 2002-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4861 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/937/06937517.pdf [firstpage_image] =>[orig_patent_app_number] => 10197782 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/197782
Clock regulation scheme for varying loads Jul 17, 2002 Issued
Array ( [id] => 1350016 [patent_doc_number] => 06590804 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-08 [patent_title] => 'Adjustable current mode differential amplifier' [patent_app_type] => B1 [patent_app_number] => 10/198278 [patent_app_country] => US [patent_app_date] => 2002-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 7012 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/590/06590804.pdf [firstpage_image] =>[orig_patent_app_number] => 10198278 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/198278
Adjustable current mode differential amplifier Jul 15, 2002 Issued
Array ( [id] => 6773214 [patent_doc_number] => 20030016552 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-23 [patent_title] => 'Read only memory' [patent_app_type] => new [patent_app_number] => 10/195379 [patent_app_country] => US [patent_app_date] => 2002-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 11560 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0016/20030016552.pdf [firstpage_image] =>[orig_patent_app_number] => 10195379 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/195379
Read only memory Jul 15, 2002 Issued
Array ( [id] => 1275733 [patent_doc_number] => 06654270 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-11-25 [patent_title] => 'Directional coupling memory module' [patent_app_type] => B2 [patent_app_number] => 10/191112 [patent_app_country] => US [patent_app_date] => 2002-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 22 [patent_no_of_words] => 10005 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/654/06654270.pdf [firstpage_image] =>[orig_patent_app_number] => 10191112 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/191112
Directional coupling memory module Jul 9, 2002 Issued
Array ( [id] => 6757614 [patent_doc_number] => 20030005391 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-02 [patent_title] => 'Sensor adjusting circuit' [patent_app_type] => new [patent_app_number] => 10/191407 [patent_app_country] => US [patent_app_date] => 2002-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 12373 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0005/20030005391.pdf [firstpage_image] =>[orig_patent_app_number] => 10191407 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/191407
Sensor adjusting circuit Jul 9, 2002 Abandoned
Array ( [id] => 977342 [patent_doc_number] => 06934210 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-23 [patent_title] => 'Semiconductor memory circuit' [patent_app_type] => utility [patent_app_number] => 10/190480 [patent_app_country] => US [patent_app_date] => 2002-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 44 [patent_no_of_words] => 16785 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/934/06934210.pdf [firstpage_image] =>[orig_patent_app_number] => 10190480 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/190480
Semiconductor memory circuit Jul 8, 2002 Issued
Array ( [id] => 1016155 [patent_doc_number] => 06894945 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-17 [patent_title] => 'Clock synchronous semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 10/189577 [patent_app_country] => US [patent_app_date] => 2002-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 86 [patent_no_of_words] => 33532 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/894/06894945.pdf [firstpage_image] =>[orig_patent_app_number] => 10189577 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/189577
Clock synchronous semiconductor memory device Jul 7, 2002 Issued
Array ( [id] => 6743957 [patent_doc_number] => 20030021140 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-30 [patent_title] => 'Semiconductor memory' [patent_app_type] => new [patent_app_number] => 10/188977 [patent_app_country] => US [patent_app_date] => 2002-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6072 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0021/20030021140.pdf [firstpage_image] =>[orig_patent_app_number] => 10188977 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/188977
Semiconductor memory Jul 4, 2002 Issued
Array ( [id] => 1135634 [patent_doc_number] => 06788577 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-07 [patent_title] => 'Nonvolatile semiconductor memory' [patent_app_type] => B2 [patent_app_number] => 10/188082 [patent_app_country] => US [patent_app_date] => 2002-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4945 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/788/06788577.pdf [firstpage_image] =>[orig_patent_app_number] => 10188082 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/188082
Nonvolatile semiconductor memory Jul 2, 2002 Issued
Array ( [id] => 6644286 [patent_doc_number] => 20030007414 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-09 [patent_title] => 'Clock synchronous circuit' [patent_app_type] => new [patent_app_number] => 10/188683 [patent_app_country] => US [patent_app_date] => 2002-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 40 [patent_no_of_words] => 20850 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20030007414.pdf [firstpage_image] =>[orig_patent_app_number] => 10188683 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/188683
Clock synchronous circuit Jul 1, 2002 Issued
Array ( [id] => 1183150 [patent_doc_number] => 06744656 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-01 [patent_title] => 'Semiconductor device and process for manufacturing the same' [patent_app_type] => B2 [patent_app_number] => 10/184920 [patent_app_country] => US [patent_app_date] => 2002-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 22 [patent_no_of_words] => 9294 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/744/06744656.pdf [firstpage_image] =>[orig_patent_app_number] => 10184920 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/184920
Semiconductor device and process for manufacturing the same Jun 30, 2002 Issued
Array ( [id] => 1425171 [patent_doc_number] => 06512695 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-01-28 [patent_title] => 'Field programmable logic arrays with transistors with vertical gates' [patent_app_type] => B2 [patent_app_number] => 10/184546 [patent_app_country] => US [patent_app_date] => 2002-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 27 [patent_no_of_words] => 11270 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/512/06512695.pdf [firstpage_image] =>[orig_patent_app_number] => 10184546 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/184546
Field programmable logic arrays with transistors with vertical gates Jun 27, 2002 Issued
Array ( [id] => 1319703 [patent_doc_number] => 06611451 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-26 [patent_title] => 'Memory array and wordline driver supply voltage differential in standby' [patent_app_type] => B1 [patent_app_number] => 10/185380 [patent_app_country] => US [patent_app_date] => 2002-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1176 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/611/06611451.pdf [firstpage_image] =>[orig_patent_app_number] => 10185380 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/185380
Memory array and wordline driver supply voltage differential in standby Jun 27, 2002 Issued
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