
Trong Q. Phan
Examiner (ID: 14718, Phone: (571)272-1794 , Office: P/2825 )
| Most Active Art Unit | 2818 |
| Art Unit(s) | 2511, 2825, 2899, 2818, 2827, 2824, 2504 |
| Total Applications | 3077 |
| Issued Applications | 2717 |
| Pending Applications | 50 |
| Abandoned Applications | 311 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1334754
[patent_doc_number] => 06600690
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-07-29
[patent_title] => 'Sense amplifier for a memory having at least two distinct resistance states'
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[patent_app_number] => 10/184784
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Array
(
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[patent_doc_number] => 06711087
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[patent_issue_date] => 2004-03-23
[patent_title] => 'Limited swing driver circuit'
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Array
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[patent_issue_date] => 2004-01-01
[patent_title] => 'Multiple-mode memory and method for forming same'
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Array
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[patent_issue_date] => 2003-01-02
[patent_title] => 'Method for assessing the quality of a memory unit'
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Array
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[patent_issue_date] => 2005-05-24
[patent_title] => 'SRAM device'
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Array
(
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[patent_title] => 'FERROELECTRIC WRITE ONCE READ ONLY MEMORY FOR ARCHIVAL STORAGE'
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[firstpage_image] =>[orig_patent_app_number] => 10177082
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/177082 | Ferroelectric write once read only memory for archival storage | Jun 20, 2002 | Issued |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/177884 | Nonvolatile nor semiconductor memory device and method for programming the memory device | Jun 19, 2002 | Issued |
Array
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[patent_title] => 'Semiconductor integrated circuit device and semiconductor device system'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/177583 | Semiconductor integrated circuit device and semiconductor device system | Jun 18, 2002 | Issued |
Array
(
[id] => 6638119
[patent_doc_number] => 20030006742
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[patent_title] => 'Memory circuit including booster pump for programming voltage generation'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/174193 | Memory circuit including booster pump for programming voltage generation | Jun 16, 2002 | Issued |
Array
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Array
(
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Array
(
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[patent_title] => 'System and method for enabling chip level erasing and writing for magnetic random access memory devices'
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Array
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Array
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[patent_title] => 'On-chip charge distribution measurement circuit'
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Array
(
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Array
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Array
(
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/138002 | Method for protecting an over-erasure of redundant memory cells during test for high-density nonvolatile memory semiconductor devices | May 2, 2002 | Issued |