Search

Trong Q. Phan

Examiner (ID: 14718, Phone: (571)272-1794 , Office: P/2825 )

Most Active Art Unit
2818
Art Unit(s)
2511, 2825, 2899, 2818, 2827, 2824, 2504
Total Applications
3077
Issued Applications
2717
Pending Applications
50
Abandoned Applications
311

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5998485 [patent_doc_number] => 20020027826 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-03-07 [patent_title] => 'Column decoding apparatus for use in a semiconductor memory device' [patent_app_type] => new [patent_app_number] => 09/895882 [patent_app_country] => US [patent_app_date] => 2001-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 1870 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20020027826.pdf [firstpage_image] =>[orig_patent_app_number] => 09895882 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/895882
Column decoding apparatus for use in a semiconductor memory device Jun 28, 2001 Issued
Array ( [id] => 6139705 [patent_doc_number] => 20020001233 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-03 [patent_title] => 'Read protection circuit of nonvolatile memory' [patent_app_type] => new [patent_app_number] => 09/892984 [patent_app_country] => US [patent_app_date] => 2001-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2552 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20020001233.pdf [firstpage_image] =>[orig_patent_app_number] => 09892984 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/892984
Read protection circuit of nonvolatile memory Jun 26, 2001 Issued
Array ( [id] => 6320992 [patent_doc_number] => 20020196652 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-26 [patent_title] => 'Read only memory structure' [patent_app_type] => new [patent_app_number] => 09/888878 [patent_app_country] => US [patent_app_date] => 2001-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5617 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 27 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0196/20020196652.pdf [firstpage_image] =>[orig_patent_app_number] => 09888878 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/888878
Read only memory structure Jun 24, 2001 Issued
Array ( [id] => 6986282 [patent_doc_number] => 20010036114 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-01 [patent_title] => 'Semiconductor memory device having faulty cells' [patent_app_type] => new [patent_app_number] => 09/886133 [patent_app_country] => US [patent_app_date] => 2001-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 12617 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20010036114.pdf [firstpage_image] =>[orig_patent_app_number] => 09886133 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/886133
Semiconductor memory device having faulty cells Jun 21, 2001 Issued
Array ( [id] => 6986290 [patent_doc_number] => 20010036122 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-01 [patent_title] => 'Semiconductor device' [patent_app_type] => new [patent_app_number] => 09/885066 [patent_app_country] => US [patent_app_date] => 2001-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 12878 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20010036122.pdf [firstpage_image] =>[orig_patent_app_number] => 09885066 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/885066
Semiconductor device Jun 20, 2001 Issued
Array ( [id] => 1599673 [patent_doc_number] => 06385090 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-07 [patent_title] => 'Semiconductor nonvolatile memory using floating gate' [patent_app_type] => B1 [patent_app_number] => 09/883377 [patent_app_country] => US [patent_app_date] => 2001-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5759 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/385/06385090.pdf [firstpage_image] =>[orig_patent_app_number] => 09883377 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/883377
Semiconductor nonvolatile memory using floating gate Jun 18, 2001 Issued
Array ( [id] => 6014055 [patent_doc_number] => 20020101769 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-01 [patent_title] => 'High frequency pulse width modulation driver, particularly useful for electrostatically actuated MEMS array' [patent_app_type] => new [patent_app_number] => 09/884676 [patent_app_country] => US [patent_app_date] => 2001-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 11336 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0101/20020101769.pdf [firstpage_image] =>[orig_patent_app_number] => 09884676 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/884676
High frequency pulse width modulation driver, particularly useful for electrostatically actuated MEMS array Jun 18, 2001 Issued
Array ( [id] => 5903618 [patent_doc_number] => 20020141268 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-03 [patent_title] => '1-T MEMORY STRUCTURE CAPABLE OF PERFORMING HIDDEN REFRESH AND AN OPERATING METHOD APPLIED THERETO' [patent_app_type] => new [patent_app_number] => 09/880784 [patent_app_country] => US [patent_app_date] => 2001-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2334 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0141/20020141268.pdf [firstpage_image] =>[orig_patent_app_number] => 09880784 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/880784
1-T memory structure capable of performing hidden refresh and an operating method applied thereto Jun 14, 2001 Issued
Array ( [id] => 7645834 [patent_doc_number] => 06477689 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-05 [patent_title] => 'Architectural structure of a process netlist design tool' [patent_app_type] => B1 [patent_app_number] => 09/880444 [patent_app_country] => US [patent_app_date] => 2001-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 3277 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 8 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/477/06477689.pdf [firstpage_image] =>[orig_patent_app_number] => 09880444 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/880444
Architectural structure of a process netlist design tool Jun 12, 2001 Issued
Array ( [id] => 6999304 [patent_doc_number] => 20010053087 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-12-20 [patent_title] => 'Method for driving semiconductor memory' [patent_app_type] => new [patent_app_number] => 09/879079 [patent_app_country] => US [patent_app_date] => 2001-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 11238 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0053/20010053087.pdf [firstpage_image] =>[orig_patent_app_number] => 09879079 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/879079
Method for driving semiconductor memory Jun 12, 2001 Issued
Array ( [id] => 1366039 [patent_doc_number] => 06581193 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-17 [patent_title] => 'Apparatus and methods for modeling process effects and imaging effects in scanning electron microscopy' [patent_app_type] => B1 [patent_app_number] => 09/881451 [patent_app_country] => US [patent_app_date] => 2001-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 19 [patent_no_of_words] => 6391 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/581/06581193.pdf [firstpage_image] =>[orig_patent_app_number] => 09881451 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/881451
Apparatus and methods for modeling process effects and imaging effects in scanning electron microscopy Jun 12, 2001 Issued
Array ( [id] => 1513525 [patent_doc_number] => 06442738 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-27 [patent_title] => 'RTL back annotator' [patent_app_type] => B1 [patent_app_number] => 09/879297 [patent_app_country] => US [patent_app_date] => 2001-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2875 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/442/06442738.pdf [firstpage_image] =>[orig_patent_app_number] => 09879297 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/879297
RTL back annotator Jun 11, 2001 Issued
Array ( [id] => 1509167 [patent_doc_number] => 06467067 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-15 [patent_title] => '-discrepant self-test technique' [patent_app_type] => B1 [patent_app_number] => 09/879845 [patent_app_country] => US [patent_app_date] => 2001-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2497 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/467/06467067.pdf [firstpage_image] =>[orig_patent_app_number] => 09879845 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/879845
-discrepant self-test technique Jun 11, 2001 Issued
Array ( [id] => 1585121 [patent_doc_number] => 06449751 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-10 [patent_title] => 'Method of analyzing static current test vectors with reduced file sizes for semiconductor integrated circuits' [patent_app_type] => B1 [patent_app_number] => 09/879417 [patent_app_country] => US [patent_app_date] => 2001-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 6433 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/449/06449751.pdf [firstpage_image] =>[orig_patent_app_number] => 09879417 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/879417
Method of analyzing static current test vectors with reduced file sizes for semiconductor integrated circuits Jun 11, 2001 Issued
Array ( [id] => 1485263 [patent_doc_number] => 06453451 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-17 [patent_title] => 'Generating standard delay format files with conditional path delay for designing integrated circuits' [patent_app_type] => B1 [patent_app_number] => 09/880607 [patent_app_country] => US [patent_app_date] => 2001-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3367 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/453/06453451.pdf [firstpage_image] =>[orig_patent_app_number] => 09880607 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/880607
Generating standard delay format files with conditional path delay for designing integrated circuits Jun 11, 2001 Issued
Array ( [id] => 1564255 [patent_doc_number] => 06438042 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-20 [patent_title] => 'Arrangement of bitline boosting capacitor in semiconductor memory device' [patent_app_type] => B1 [patent_app_number] => 09/879076 [patent_app_country] => US [patent_app_date] => 2001-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2572 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/438/06438042.pdf [firstpage_image] =>[orig_patent_app_number] => 09879076 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/879076
Arrangement of bitline boosting capacitor in semiconductor memory device Jun 10, 2001 Issued
09/874212 Semiconductor memory device and method of operation thereof Jun 5, 2001 Abandoned
Array ( [id] => 1513521 [patent_doc_number] => 06442737 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-27 [patent_title] => 'Method of generating an optimal clock buffer set for minimizing clock skew in balanced clock trees' [patent_app_type] => B1 [patent_app_number] => 09/876736 [patent_app_country] => US [patent_app_date] => 2001-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2369 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/442/06442737.pdf [firstpage_image] =>[orig_patent_app_number] => 09876736 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/876736
Method of generating an optimal clock buffer set for minimizing clock skew in balanced clock trees Jun 5, 2001 Issued
Array ( [id] => 6895699 [patent_doc_number] => 20010026489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-04 [patent_title] => 'Semiconductor storage' [patent_app_type] => new [patent_app_number] => 09/874222 [patent_app_country] => US [patent_app_date] => 2001-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5586 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20010026489.pdf [firstpage_image] =>[orig_patent_app_number] => 09874222 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/874222
Semiconductor storage Jun 5, 2001 Abandoned
Array ( [id] => 1383920 [patent_doc_number] => 06567295 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-05-20 [patent_title] => 'Addressing and sensing a cross-point diode memory array' [patent_app_type] => B2 [patent_app_number] => 09/875496 [patent_app_country] => US [patent_app_date] => 2001-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 8250 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/567/06567295.pdf [firstpage_image] =>[orig_patent_app_number] => 09875496 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/875496
Addressing and sensing a cross-point diode memory array Jun 4, 2001 Issued
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