Search

Trong Q Phan

Examiner (ID: 15831, Phone: (571)272-1794 , Office: P/2825 )

Most Active Art Unit
2818
Art Unit(s)
2827, 2511, 2504, 2824, 2825, 2899, 2818
Total Applications
3077
Issued Applications
2717
Pending Applications
50
Abandoned Applications
311

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1461194 [patent_doc_number] => 06426911 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-30 [patent_title] => 'Area efficient method for programming electrical fuses' [patent_app_type] => B1 [patent_app_number] => 09/691953 [patent_app_country] => US [patent_app_date] => 2000-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3409 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/426/06426911.pdf [firstpage_image] =>[orig_patent_app_number] => 09691953 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/691953
Area efficient method for programming electrical fuses Oct 18, 2000 Issued
Array ( [id] => 4327753 [patent_doc_number] => 06243319 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-05 [patent_title] => 'Semiconductor memory equipped with row address decoder having reduced signal propagation delay time' [patent_app_type] => 1 [patent_app_number] => 9/689676 [patent_app_country] => US [patent_app_date] => 2000-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 3657 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/243/06243319.pdf [firstpage_image] =>[orig_patent_app_number] => 689676 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/689676
Semiconductor memory equipped with row address decoder having reduced signal propagation delay time Oct 12, 2000 Issued
09/686957 Sensor adjusting circuit Oct 11, 2000 Abandoned
Array ( [id] => 1431731 [patent_doc_number] => 06504778 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-07 [patent_title] => 'Semiconductor memory device' [patent_app_type] => B1 [patent_app_number] => 09/686676 [patent_app_country] => US [patent_app_date] => 2000-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 17407 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/504/06504778.pdf [firstpage_image] =>[orig_patent_app_number] => 09686676 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/686676
Semiconductor memory device Oct 10, 2000 Issued
Array ( [id] => 1511355 [patent_doc_number] => 06442070 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-27 [patent_title] => 'Semiconductor nonvolatile memory apparatus and computer system using the same' [patent_app_type] => B1 [patent_app_number] => 09/680936 [patent_app_country] => US [patent_app_date] => 2000-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 68 [patent_no_of_words] => 22602 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/442/06442070.pdf [firstpage_image] =>[orig_patent_app_number] => 09680936 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/680936
Semiconductor nonvolatile memory apparatus and computer system using the same Oct 9, 2000 Issued
Array ( [id] => 1525631 [patent_doc_number] => 06353560 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-05 [patent_title] => 'Semiconductor memory device' [patent_app_type] => B1 [patent_app_number] => 09/686477 [patent_app_country] => US [patent_app_date] => 2000-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4828 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/353/06353560.pdf [firstpage_image] =>[orig_patent_app_number] => 09686477 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/686477
Semiconductor memory device Oct 9, 2000 Issued
Array ( [id] => 4318282 [patent_doc_number] => 06327217 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-04 [patent_title] => 'Variable latency buffer circuits, latency determination circuits and methods of operation thereof' [patent_app_type] => 1 [patent_app_number] => 9/679784 [patent_app_country] => US [patent_app_date] => 2000-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 3758 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/327/06327217.pdf [firstpage_image] =>[orig_patent_app_number] => 679784 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/679784
Variable latency buffer circuits, latency determination circuits and methods of operation thereof Oct 4, 2000 Issued
Array ( [id] => 1477164 [patent_doc_number] => 06388594 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-14 [patent_title] => 'Method of calibrating analog and digital converters' [patent_app_type] => B1 [patent_app_number] => 09/680057 [patent_app_country] => US [patent_app_date] => 2000-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 10867 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/388/06388594.pdf [firstpage_image] =>[orig_patent_app_number] => 09680057 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/680057
Method of calibrating analog and digital converters Oct 3, 2000 Issued
Array ( [id] => 1565169 [patent_doc_number] => 06363009 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-26 [patent_title] => 'Storage device' [patent_app_type] => B1 [patent_app_number] => 09/677878 [patent_app_country] => US [patent_app_date] => 2000-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 6790 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/363/06363009.pdf [firstpage_image] =>[orig_patent_app_number] => 09677878 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/677878
Storage device Oct 2, 2000 Issued
Array ( [id] => 1511403 [patent_doc_number] => 06442085 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-27 [patent_title] => 'Self-Test pattern to detect stuck open faults' [patent_app_type] => B1 [patent_app_number] => 09/677681 [patent_app_country] => US [patent_app_date] => 2000-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 7458 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/442/06442085.pdf [firstpage_image] =>[orig_patent_app_number] => 09677681 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/677681
Self-Test pattern to detect stuck open faults Oct 1, 2000 Issued
Array ( [id] => 1427734 [patent_doc_number] => 06519176 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-11 [patent_title] => 'Dual threshold SRAM cell for single-ended sensing' [patent_app_type] => B1 [patent_app_number] => 09/675579 [patent_app_country] => US [patent_app_date] => 2000-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1863 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/519/06519176.pdf [firstpage_image] =>[orig_patent_app_number] => 09675579 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/675579
Dual threshold SRAM cell for single-ended sensing Sep 28, 2000 Issued
Array ( [id] => 4425580 [patent_doc_number] => 06225933 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-01 [patent_title] => 'Digital to analog converter using magnetoresistive memory technology' [patent_app_type] => 1 [patent_app_number] => 9/675181 [patent_app_country] => US [patent_app_date] => 2000-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 30 [patent_no_of_words] => 22707 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/225/06225933.pdf [firstpage_image] =>[orig_patent_app_number] => 675181 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/675181
Digital to analog converter using magnetoresistive memory technology Sep 28, 2000 Issued
Array ( [id] => 4313015 [patent_doc_number] => 06252471 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-26 [patent_title] => 'Programmable oscillator using magnetoresistive memory technology' [patent_app_type] => 1 [patent_app_number] => 9/675182 [patent_app_country] => US [patent_app_date] => 2000-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 30 [patent_no_of_words] => 22719 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/252/06252471.pdf [firstpage_image] =>[orig_patent_app_number] => 675182 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/675182
Programmable oscillator using magnetoresistive memory technology Sep 28, 2000 Issued
Array ( [id] => 1376743 [patent_doc_number] => 06570788 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-27 [patent_title] => 'Semiconductor device and method of driving and method of producing the same' [patent_app_type] => B1 [patent_app_number] => 09/675078 [patent_app_country] => US [patent_app_date] => 2000-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 20 [patent_no_of_words] => 10366 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/570/06570788.pdf [firstpage_image] =>[orig_patent_app_number] => 09675078 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/675078
Semiconductor device and method of driving and method of producing the same Sep 27, 2000 Issued
Array ( [id] => 1478533 [patent_doc_number] => 06388940 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-14 [patent_title] => 'Leakage-tolerant circuit and method for large register files' [patent_app_type] => B1 [patent_app_number] => 09/672177 [patent_app_country] => US [patent_app_date] => 2000-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 794 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/388/06388940.pdf [firstpage_image] =>[orig_patent_app_number] => 09672177 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/672177
Leakage-tolerant circuit and method for large register files Sep 26, 2000 Issued
Array ( [id] => 1208657 [patent_doc_number] => 06717860 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-06 [patent_title] => 'Method of erasing non-volatile semiconductor memory device and such non-volatile semiconductor memory device' [patent_app_type] => B1 [patent_app_number] => 09/664480 [patent_app_country] => US [patent_app_date] => 2000-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 20 [patent_no_of_words] => 11432 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/717/06717860.pdf [firstpage_image] =>[orig_patent_app_number] => 09664480 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/664480
Method of erasing non-volatile semiconductor memory device and such non-volatile semiconductor memory device Sep 17, 2000 Issued
Array ( [id] => 4426435 [patent_doc_number] => 06226220 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-01 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 9/664384 [patent_app_country] => US [patent_app_date] => 2000-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10250 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/226/06226220.pdf [firstpage_image] =>[orig_patent_app_number] => 664384 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/664384
Semiconductor memory device Sep 17, 2000 Issued
Array ( [id] => 4418385 [patent_doc_number] => 06310793 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-30 [patent_title] => 'Segmented word line architecture for dividing up a word line into a plurality of banks for cell arrays having long bit lines' [patent_app_type] => 1 [patent_app_number] => 9/663583 [patent_app_country] => US [patent_app_date] => 2000-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 1660 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/310/06310793.pdf [firstpage_image] =>[orig_patent_app_number] => 663583 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/663583
Segmented word line architecture for dividing up a word line into a plurality of banks for cell arrays having long bit lines Sep 17, 2000 Issued
Array ( [id] => 1480072 [patent_doc_number] => 06344989 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-05 [patent_title] => 'Programmable logic devices with improved content addressable memory capabilities' [patent_app_type] => B1 [patent_app_number] => 09/658914 [patent_app_country] => US [patent_app_date] => 2000-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5929 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/344/06344989.pdf [firstpage_image] =>[orig_patent_app_number] => 09658914 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/658914
Programmable logic devices with improved content addressable memory capabilities Sep 10, 2000 Issued
Array ( [id] => 4331460 [patent_doc_number] => 06249476 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-19 [patent_title] => 'Semiconductor memory device suitable for mounting mixed with logic circuit, having short cycle time in reading operation' [patent_app_type] => 1 [patent_app_number] => 9/654876 [patent_app_country] => US [patent_app_date] => 2000-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 22 [patent_no_of_words] => 12339 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/249/06249476.pdf [firstpage_image] =>[orig_patent_app_number] => 654876 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/654876
Semiconductor memory device suitable for mounting mixed with logic circuit, having short cycle time in reading operation Sep 4, 2000 Issued
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