Search

Trong Q Phan

Examiner (ID: 15831, Phone: (571)272-1794 , Office: P/2825 )

Most Active Art Unit
2818
Art Unit(s)
2827, 2511, 2504, 2824, 2825, 2899, 2818
Total Applications
3077
Issued Applications
2717
Pending Applications
50
Abandoned Applications
311

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4115262 [patent_doc_number] => 06052331 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-18 [patent_title] => 'Synchronous semiconductor device allowing reduction in chip area by sharing delay circuit' [patent_app_type] => 1 [patent_app_number] => 9/225450 [patent_app_country] => US [patent_app_date] => 1999-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 11142 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/052/06052331.pdf [firstpage_image] =>[orig_patent_app_number] => 225450 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/225450
Synchronous semiconductor device allowing reduction in chip area by sharing delay circuit Jan 5, 1999 Issued
Array ( [id] => 4117104 [patent_doc_number] => 06101136 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-08 [patent_title] => 'Signal delay device for use in semiconductor storage device for improved burst mode operation' [patent_app_type] => 1 [patent_app_number] => 9/226049 [patent_app_country] => US [patent_app_date] => 1999-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 17068 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/101/06101136.pdf [firstpage_image] =>[orig_patent_app_number] => 226049 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/226049
Signal delay device for use in semiconductor storage device for improved burst mode operation Jan 3, 1999 Issued
Array ( [id] => 3925401 [patent_doc_number] => 06002633 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-14 [patent_title] => 'Performance optimizing compiler for building a compiled SRAM' [patent_app_type] => 1 [patent_app_number] => 9/225075 [patent_app_country] => US [patent_app_date] => 1999-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 4452 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/002/06002633.pdf [firstpage_image] =>[orig_patent_app_number] => 225075 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/225075
Performance optimizing compiler for building a compiled SRAM Jan 3, 1999 Issued
Array ( [id] => 4424747 [patent_doc_number] => 06177892 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-23 [patent_title] => 'EFM/DVD demodulator' [patent_app_type] => 1 [patent_app_number] => 9/224452 [patent_app_country] => US [patent_app_date] => 1998-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5263 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/177/06177892.pdf [firstpage_image] =>[orig_patent_app_number] => 224452 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/224452
EFM/DVD demodulator Dec 30, 1998 Issued
Array ( [id] => 4112367 [patent_doc_number] => 06100825 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-08 [patent_title] => 'Cluster-based data compression system and method' [patent_app_type] => 1 [patent_app_number] => 9/224268 [patent_app_country] => US [patent_app_date] => 1998-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5584 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/100/06100825.pdf [firstpage_image] =>[orig_patent_app_number] => 224268 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/224268
Cluster-based data compression system and method Dec 30, 1998 Issued
Array ( [id] => 4143366 [patent_doc_number] => 06121901 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-19 [patent_title] => 'Data compression and decompression system with immediate dictionary updating interleaved with string search' [patent_app_type] => 1 [patent_app_number] => 9/223352 [patent_app_country] => US [patent_app_date] => 1998-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 28 [patent_no_of_words] => 12613 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/121/06121901.pdf [firstpage_image] =>[orig_patent_app_number] => 223352 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/223352
Data compression and decompression system with immediate dictionary updating interleaved with string search Dec 29, 1998 Issued
Array ( [id] => 4423161 [patent_doc_number] => 06272666 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-07 [patent_title] => 'Transistor group mismatch detection and reduction' [patent_app_type] => 1 [patent_app_number] => 9/224574 [patent_app_country] => US [patent_app_date] => 1998-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 8446 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/272/06272666.pdf [firstpage_image] =>[orig_patent_app_number] => 224574 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/224574
Transistor group mismatch detection and reduction Dec 29, 1998 Issued
Array ( [id] => 4368305 [patent_doc_number] => 06191710 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-20 [patent_title] => 'Data compression and decompression method and system for data compression and decompression' [patent_app_type] => 1 [patent_app_number] => 9/222956 [patent_app_country] => US [patent_app_date] => 1998-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 5009 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/191/06191710.pdf [firstpage_image] =>[orig_patent_app_number] => 222956 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/222956
Data compression and decompression method and system for data compression and decompression Dec 29, 1998 Issued
Array ( [id] => 4293201 [patent_doc_number] => 06247162 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-12 [patent_title] => 'Method and apparatus for generating layout data for a semiconductor integrated circuit device' [patent_app_type] => 1 [patent_app_number] => 9/221600 [patent_app_country] => US [patent_app_date] => 1998-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 28 [patent_no_of_words] => 8157 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/247/06247162.pdf [firstpage_image] =>[orig_patent_app_number] => 221600 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/221600
Method and apparatus for generating layout data for a semiconductor integrated circuit device Dec 28, 1998 Issued
Array ( [id] => 4192265 [patent_doc_number] => 06038194 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-14 [patent_title] => 'Memory decoder with zero static power' [patent_app_type] => 1 [patent_app_number] => 9/221950 [patent_app_country] => US [patent_app_date] => 1998-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4157 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/038/06038194.pdf [firstpage_image] =>[orig_patent_app_number] => 221950 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/221950
Memory decoder with zero static power Dec 27, 1998 Issued
Array ( [id] => 4193603 [patent_doc_number] => 06160508 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-12 [patent_title] => 'Method and device for analogue to digital conversion' [patent_app_type] => 1 [patent_app_number] => 9/220765 [patent_app_country] => US [patent_app_date] => 1998-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3701 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/160/06160508.pdf [firstpage_image] =>[orig_patent_app_number] => 220765 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/220765
Method and device for analogue to digital conversion Dec 27, 1998 Issued
Array ( [id] => 4193794 [patent_doc_number] => 06094152 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-25 [patent_title] => 'Algorithm for A/D window control for electronic portal image acquisition in a radiotherapy system' [patent_app_type] => 1 [patent_app_number] => 9/220872 [patent_app_country] => US [patent_app_date] => 1998-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3722 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 273 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/094/06094152.pdf [firstpage_image] =>[orig_patent_app_number] => 220872 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/220872
Algorithm for A/D window control for electronic portal image acquisition in a radiotherapy system Dec 22, 1998 Issued
Array ( [id] => 3946501 [patent_doc_number] => 05973520 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-26 [patent_title] => 'Output buffer circuit having a variable output impedance' [patent_app_type] => 1 [patent_app_number] => 9/219350 [patent_app_country] => US [patent_app_date] => 1998-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2233 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/973/05973520.pdf [firstpage_image] =>[orig_patent_app_number] => 219350 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/219350
Output buffer circuit having a variable output impedance Dec 22, 1998 Issued
Array ( [id] => 4155044 [patent_doc_number] => 06031758 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-29 [patent_title] => 'Semiconductor memory device having faulty cells' [patent_app_type] => 1 [patent_app_number] => 9/125547 [patent_app_country] => US [patent_app_date] => 1998-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 12496 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/031/06031758.pdf [firstpage_image] =>[orig_patent_app_number] => 125547 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/125547
Semiconductor memory device having faulty cells Dec 22, 1998 Issued
Array ( [id] => 4017279 [patent_doc_number] => 06005790 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-21 [patent_title] => 'Floating gate content addressable memory' [patent_app_type] => 1 [patent_app_number] => 9/219546 [patent_app_country] => US [patent_app_date] => 1998-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3918 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/005/06005790.pdf [firstpage_image] =>[orig_patent_app_number] => 219546 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/219546
Floating gate content addressable memory Dec 21, 1998 Issued
Array ( [id] => 4012588 [patent_doc_number] => 05986969 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-16 [patent_title] => 'Power savings for memory arrays' [patent_app_type] => 1 [patent_app_number] => 9/217613 [patent_app_country] => US [patent_app_date] => 1998-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3322 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/986/05986969.pdf [firstpage_image] =>[orig_patent_app_number] => 217613 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/217613
Power savings for memory arrays Dec 21, 1998 Issued
Array ( [id] => 4198959 [patent_doc_number] => 06130634 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-10 [patent_title] => 'Resistor string DAC with improved speed' [patent_app_type] => 1 [patent_app_number] => 9/219173 [patent_app_country] => US [patent_app_date] => 1998-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 1433 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/130/06130634.pdf [firstpage_image] =>[orig_patent_app_number] => 219173 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/219173
Resistor string DAC with improved speed Dec 21, 1998 Issued
Array ( [id] => 4204451 [patent_doc_number] => 06044004 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-28 [patent_title] => 'Memory integrated circuit for storing digital and analog data and method' [patent_app_type] => 1 [patent_app_number] => 9/219548 [patent_app_country] => US [patent_app_date] => 1998-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 5294 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/044/06044004.pdf [firstpage_image] =>[orig_patent_app_number] => 219548 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/219548
Memory integrated circuit for storing digital and analog data and method Dec 21, 1998 Issued
Array ( [id] => 4064982 [patent_doc_number] => 05969992 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-19 [patent_title] => 'EEPROM cell using P-well for tunneling across a channel' [patent_app_type] => 1 [patent_app_number] => 9/217647 [patent_app_country] => US [patent_app_date] => 1998-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4989 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/969/05969992.pdf [firstpage_image] =>[orig_patent_app_number] => 217647 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/217647
EEPROM cell using P-well for tunneling across a channel Dec 20, 1998 Issued
Array ( [id] => 4185200 [patent_doc_number] => 06141247 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-31 [patent_title] => 'Non-volatile data storage unit and method of controlling same' [patent_app_type] => 1 [patent_app_number] => 9/217874 [patent_app_country] => US [patent_app_date] => 1998-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3999 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/141/06141247.pdf [firstpage_image] =>[orig_patent_app_number] => 217874 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/217874
Non-volatile data storage unit and method of controlling same Dec 20, 1998 Issued
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