Search

Trong Q Phan

Examiner (ID: 15831, Phone: (571)272-1794 , Office: P/2825 )

Most Active Art Unit
2818
Art Unit(s)
2827, 2511, 2504, 2824, 2825, 2899, 2818
Total Applications
3077
Issued Applications
2717
Pending Applications
50
Abandoned Applications
311

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10079696 [patent_doc_number] => 09117547 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-08-25 [patent_title] => 'Reduced stress high voltage word line driver' [patent_app_type] => utility [patent_app_number] => 13/887508 [patent_app_country] => US [patent_app_date] => 2013-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3927 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13887508 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/887508
Reduced stress high voltage word line driver May 5, 2013 Issued
Array ( [id] => 9014883 [patent_doc_number] => 20130229847 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-05 [patent_title] => 'MEMORY DIES, STACKED MEMORIES, MEMORY DEVICES AND METHODS' [patent_app_type] => utility [patent_app_number] => 13/860161 [patent_app_country] => US [patent_app_date] => 2013-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 12332 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13860161 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/860161
Memory dies, stacked memories, memory devices and methods Apr 9, 2013 Issued
Array ( [id] => 9014892 [patent_doc_number] => 20130229856 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-05 [patent_title] => 'CIRCUITS AND TECHNIQUES TO COMPENSATE MEMORY ACCESS SIGNALS FOR VARIATIONS OF PARAMETERS IN MULTIPLE LAYERS OF MEMORY' [patent_app_type] => utility [patent_app_number] => 13/858482 [patent_app_country] => US [patent_app_date] => 2013-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7266 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13858482 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/858482
Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memory Apr 7, 2013 Issued
Array ( [id] => 9924677 [patent_doc_number] => 08982651 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-17 [patent_title] => 'Memory with an assist determination controller and associated methods' [patent_app_type] => utility [patent_app_number] => 13/852222 [patent_app_country] => US [patent_app_date] => 2013-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 5285 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13852222 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/852222
Memory with an assist determination controller and associated methods Mar 27, 2013 Issued
Array ( [id] => 10035222 [patent_doc_number] => 09076541 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-07 [patent_title] => 'Architecture for magnetic memories including magnetic tunneling junctions using spin-orbit interaction based switching' [patent_app_type] => utility [patent_app_number] => 13/851274 [patent_app_country] => US [patent_app_date] => 2013-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 28 [patent_no_of_words] => 17656 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13851274 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/851274
Architecture for magnetic memories including magnetic tunneling junctions using spin-orbit interaction based switching Mar 26, 2013 Issued
Array ( [id] => 9770052 [patent_doc_number] => 20140293715 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-02 [patent_title] => 'SIGNAL MARGIN CENTERING FOR SINGLE-ENDED eDRAM SENSE AMPLIFIER' [patent_app_type] => utility [patent_app_number] => 13/851202 [patent_app_country] => US [patent_app_date] => 2013-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9921 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13851202 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/851202
Signal margin centering for single-ended eDRAM sense amplifier Mar 26, 2013 Issued
Array ( [id] => 9770016 [patent_doc_number] => 20140293679 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-02 [patent_title] => 'MANAGEMENT OF SRAM INITIALIZATION' [patent_app_type] => utility [patent_app_number] => 13/850370 [patent_app_country] => US [patent_app_date] => 2013-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5489 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13850370 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/850370
MANAGEMENT OF SRAM INITIALIZATION Mar 25, 2013 Abandoned
Array ( [id] => 10047170 [patent_doc_number] => 09087568 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-07-21 [patent_title] => 'Memory with merged control input' [patent_app_type] => utility [patent_app_number] => 13/848832 [patent_app_country] => US [patent_app_date] => 2013-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 25 [patent_no_of_words] => 13177 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13848832 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/848832
Memory with merged control input Mar 21, 2013 Issued
Array ( [id] => 10859170 [patent_doc_number] => 08885378 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-11 [patent_title] => 'Identifying a result using multiple content-addressable memory lookup operations' [patent_app_type] => utility [patent_app_number] => 13/847606 [patent_app_country] => US [patent_app_date] => 2013-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3148 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13847606 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/847606
Identifying a result using multiple content-addressable memory lookup operations Mar 19, 2013 Issued
Array ( [id] => 9952755 [patent_doc_number] => 09001555 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-07 [patent_title] => 'Small-grain three-dimensional memory' [patent_app_type] => utility [patent_app_number] => 13/848018 [patent_app_country] => US [patent_app_date] => 2013-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3182 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13848018 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/848018
Small-grain three-dimensional memory Mar 19, 2013 Issued
Array ( [id] => 9952747 [patent_doc_number] => 09001547 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-07 [patent_title] => 'Semiconductor apparatus, test method using the same and muti chips system' [patent_app_type] => utility [patent_app_number] => 13/846864 [patent_app_country] => US [patent_app_date] => 2013-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4363 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13846864 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/846864
Semiconductor apparatus, test method using the same and muti chips system Mar 17, 2013 Issued
Array ( [id] => 9133418 [patent_doc_number] => 20130294131 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-07 [patent_title] => 'MAGNETIC MEMORY DEVICES AND SYSTEMS' [patent_app_type] => utility [patent_app_number] => 13/846722 [patent_app_country] => US [patent_app_date] => 2013-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10740 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13846722 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/846722
MAGNETIC MEMORY DEVICES AND SYSTEMS Mar 17, 2013 Abandoned
Array ( [id] => 10131816 [patent_doc_number] => 09165657 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-20 [patent_title] => 'Operating method of memory system including NAND flash memory, variable resistance memory and controller' [patent_app_type] => utility [patent_app_number] => 13/803715 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 26 [patent_no_of_words] => 10914 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13803715 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/803715
Operating method of memory system including NAND flash memory, variable resistance memory and controller Mar 13, 2013 Issued
Array ( [id] => 9733362 [patent_doc_number] => 20140269071 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'PRESERVING DATA FROM ADJACENT WORD LINES WHILE PROGRAMMING BINARY NON-VOLATILE STORAGE ELEMENTS' [patent_app_type] => utility [patent_app_number] => 13/831420 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 18244 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13831420 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/831420
Preserving data from adjacent word lines while programming binary non-volatile storage elements Mar 13, 2013 Issued
Array ( [id] => 9002027 [patent_doc_number] => 20130223152 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-29 [patent_title] => 'CLOCK GENERATOR' [patent_app_type] => utility [patent_app_number] => 13/827244 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 14875 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13827244 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/827244
CLOCK GENERATOR Mar 13, 2013 Abandoned
Array ( [id] => 9510118 [patent_doc_number] => 20140146609 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-29 [patent_title] => 'Weighted Read Scrub For Nonvolatile Memory' [patent_app_type] => utility [patent_app_number] => 13/801741 [patent_app_country] => US [patent_app_date] => 2013-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 9294 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13801741 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/801741
Weighted read scrub for nonvolatile memory Mar 12, 2013 Issued
Array ( [id] => 11321802 [patent_doc_number] => 09520554 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-12-13 [patent_title] => 'Clamp elements for phase change memory arrays' [patent_app_type] => utility [patent_app_number] => 13/783884 [patent_app_country] => US [patent_app_date] => 2013-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 45 [patent_no_of_words] => 8184 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13783884 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/783884
Clamp elements for phase change memory arrays Mar 3, 2013 Issued
Array ( [id] => 9890313 [patent_doc_number] => 08976580 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-10 [patent_title] => 'Memory system and related method of operation' [patent_app_type] => utility [patent_app_number] => 13/783850 [patent_app_country] => US [patent_app_date] => 2013-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 7510 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13783850 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/783850
Memory system and related method of operation Mar 3, 2013 Issued
Array ( [id] => 9196741 [patent_doc_number] => 20130336056 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-19 [patent_title] => 'NONVOLATILE SEMICONDUCTOR STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 13/783360 [patent_app_country] => US [patent_app_date] => 2013-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 12109 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13783360 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/783360
Nonvolatile semiconductor storage device Mar 2, 2013 Issued
Array ( [id] => 9190179 [patent_doc_number] => 20130329494 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-12 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/783374 [patent_app_country] => US [patent_app_date] => 2013-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 24525 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13783374 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/783374
Nonvolatile semiconductor memory device Mar 2, 2013 Issued
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