Search

Trong Q Phan

Examiner (ID: 15831, Phone: (571)272-1794 , Office: P/2825 )

Most Active Art Unit
2818
Art Unit(s)
2827, 2511, 2504, 2824, 2825, 2899, 2818
Total Applications
3077
Issued Applications
2717
Pending Applications
50
Abandoned Applications
311

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4180598 [patent_doc_number] => 06140952 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-31 [patent_title] => 'Delta sigma circuit with pulse width modulated offset' [patent_app_type] => 1 [patent_app_number] => 9/217872 [patent_app_country] => US [patent_app_date] => 1998-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4217 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/140/06140952.pdf [firstpage_image] =>[orig_patent_app_number] => 217872 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/217872
Delta sigma circuit with pulse width modulated offset Dec 20, 1998 Issued
Array ( [id] => 4197623 [patent_doc_number] => 06151245 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-21 [patent_title] => 'Screened EEPROM cell' [patent_app_type] => 1 [patent_app_number] => 9/215650 [patent_app_country] => US [patent_app_date] => 1998-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1336 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/151/06151245.pdf [firstpage_image] =>[orig_patent_app_number] => 215650 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/215650
Screened EEPROM cell Dec 16, 1998 Issued
Array ( [id] => 4251487 [patent_doc_number] => 06091622 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-18 [patent_title] => 'Nonvolatile ferroelectric memory device' [patent_app_type] => 1 [patent_app_number] => 9/210783 [patent_app_country] => US [patent_app_date] => 1998-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 21 [patent_no_of_words] => 12190 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/091/06091622.pdf [firstpage_image] =>[orig_patent_app_number] => 210783 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/210783
Nonvolatile ferroelectric memory device Dec 14, 1998 Issued
Array ( [id] => 4247356 [patent_doc_number] => 06118708 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-12 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 9/208975 [patent_app_country] => US [patent_app_date] => 1998-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6245 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 27 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/118/06118708.pdf [firstpage_image] =>[orig_patent_app_number] => 208975 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/208975
Semiconductor memory device Dec 10, 1998 Issued
Array ( [id] => 4197048 [patent_doc_number] => 06094370 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-25 [patent_title] => 'Semiconductor memory device and various systems mounting them' [patent_app_type] => 1 [patent_app_number] => 9/208831 [patent_app_country] => US [patent_app_date] => 1998-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 218 [patent_figures_cnt] => 378 [patent_no_of_words] => 66447 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/094/06094370.pdf [firstpage_image] =>[orig_patent_app_number] => 208831 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/208831
Semiconductor memory device and various systems mounting them Dec 9, 1998 Issued
Array ( [id] => 4112409 [patent_doc_number] => 06100828 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-08 [patent_title] => 'Analog-to-digital converter test system and method' [patent_app_type] => 1 [patent_app_number] => 9/207556 [patent_app_country] => US [patent_app_date] => 1998-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2698 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/100/06100828.pdf [firstpage_image] =>[orig_patent_app_number] => 207556 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/207556
Analog-to-digital converter test system and method Dec 7, 1998 Issued
Array ( [id] => 4198884 [patent_doc_number] => 06130629 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-10 [patent_title] => 'Rate 24/25 (0,9) code method and system for PRML recording channels' [patent_app_type] => 1 [patent_app_number] => 9/205319 [patent_app_country] => US [patent_app_date] => 1998-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 9727 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/130/06130629.pdf [firstpage_image] =>[orig_patent_app_number] => 205319 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/205319
Rate 24/25 (0,9) code method and system for PRML recording channels Dec 3, 1998 Issued
Array ( [id] => 4166753 [patent_doc_number] => 06114981 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-05 [patent_title] => 'D/A converter' [patent_app_type] => 1 [patent_app_number] => 9/205365 [patent_app_country] => US [patent_app_date] => 1998-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 25 [patent_no_of_words] => 7480 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/114/06114981.pdf [firstpage_image] =>[orig_patent_app_number] => 205365 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/205365
D/A converter Dec 3, 1998 Issued
Array ( [id] => 4250896 [patent_doc_number] => 06081477 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-27 [patent_title] => 'Write scheme for a double data rate SDRAM' [patent_app_type] => 1 [patent_app_number] => 9/204074 [patent_app_country] => US [patent_app_date] => 1998-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5186 [patent_no_of_claims] => 64 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/081/06081477.pdf [firstpage_image] =>[orig_patent_app_number] => 204074 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/204074
Write scheme for a double data rate SDRAM Dec 2, 1998 Issued
Array ( [id] => 4204870 [patent_doc_number] => 06044032 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-28 [patent_title] => 'Addressing scheme for a double data rate SDRAM' [patent_app_type] => 1 [patent_app_number] => 9/204073 [patent_app_country] => US [patent_app_date] => 1998-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4972 [patent_no_of_claims] => 91 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/044/06044032.pdf [firstpage_image] =>[orig_patent_app_number] => 204073 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/204073
Addressing scheme for a double data rate SDRAM Dec 2, 1998 Issued
Array ( [id] => 3962114 [patent_doc_number] => 05999447 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-07 [patent_title] => 'Non-volatile electrically erasable and programmable memory' [patent_app_type] => 1 [patent_app_number] => 9/199671 [patent_app_country] => US [patent_app_date] => 1998-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 6989 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/999/05999447.pdf [firstpage_image] =>[orig_patent_app_number] => 199671 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/199671
Non-volatile electrically erasable and programmable memory Nov 24, 1998 Issued
Array ( [id] => 4367154 [patent_doc_number] => 06292418 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-18 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 9/199271 [patent_app_country] => US [patent_app_date] => 1998-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6501 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/292/06292418.pdf [firstpage_image] =>[orig_patent_app_number] => 199271 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/199271
Semiconductor memory device Nov 24, 1998 Issued
Array ( [id] => 4194172 [patent_doc_number] => 06021088 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-01 [patent_title] => 'Global wordline driver' [patent_app_type] => 1 [patent_app_number] => 9/198274 [patent_app_country] => US [patent_app_date] => 1998-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 8 [patent_no_of_words] => 2111 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/021/06021088.pdf [firstpage_image] =>[orig_patent_app_number] => 198274 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/198274
Global wordline driver Nov 23, 1998 Issued
Array ( [id] => 4034630 [patent_doc_number] => 05926429 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-20 [patent_title] => 'Semiconductor memory device and method of refreshing semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 9/199050 [patent_app_country] => US [patent_app_date] => 1998-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3552 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/926/05926429.pdf [firstpage_image] =>[orig_patent_app_number] => 199050 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/199050
Semiconductor memory device and method of refreshing semiconductor memory device Nov 23, 1998 Issued
Array ( [id] => 4194186 [patent_doc_number] => 06021089 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-01 [patent_title] => 'Address transition detection circuit' [patent_app_type] => 1 [patent_app_number] => 9/198272 [patent_app_country] => US [patent_app_date] => 1998-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 50 [patent_no_of_words] => 5027 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/021/06021089.pdf [firstpage_image] =>[orig_patent_app_number] => 198272 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/198272
Address transition detection circuit Nov 23, 1998 Issued
Array ( [id] => 4261642 [patent_doc_number] => 06137720 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-24 [patent_title] => 'Semiconductor reference voltage generator having a non-volatile memory structure' [patent_app_type] => 1 [patent_app_number] => 9/198747 [patent_app_country] => US [patent_app_date] => 1998-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 8876 [patent_no_of_claims] => 52 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/137/06137720.pdf [firstpage_image] =>[orig_patent_app_number] => 198747 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/198747
Semiconductor reference voltage generator having a non-volatile memory structure Nov 23, 1998 Issued
Array ( [id] => 4418884 [patent_doc_number] => 06240032 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-29 [patent_title] => 'Non-volatile semiconductor memory allowing user to enter various refresh commands' [patent_app_type] => 1 [patent_app_number] => 9/199875 [patent_app_country] => US [patent_app_date] => 1998-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 9145 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/240/06240032.pdf [firstpage_image] =>[orig_patent_app_number] => 199875 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/199875
Non-volatile semiconductor memory allowing user to enter various refresh commands Nov 23, 1998 Issued
Array ( [id] => 4096775 [patent_doc_number] => 06026023 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-15 [patent_title] => 'Non-volatile semiconductor memory' [patent_app_type] => 1 [patent_app_number] => 9/197372 [patent_app_country] => US [patent_app_date] => 1998-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4898 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/026/06026023.pdf [firstpage_image] =>[orig_patent_app_number] => 197372 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/197372
Non-volatile semiconductor memory Nov 19, 1998 Issued
Array ( [id] => 4304868 [patent_doc_number] => 06184813 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-06 [patent_title] => 'Method and apparatus for synchronizing signals' [patent_app_type] => 1 [patent_app_number] => 9/197197 [patent_app_country] => US [patent_app_date] => 1998-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9005 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/184/06184813.pdf [firstpage_image] =>[orig_patent_app_number] => 197197 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/197197
Method and apparatus for synchronizing signals Nov 19, 1998 Issued
Array ( [id] => 4011811 [patent_doc_number] => 05986920 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-16 [patent_title] => 'Ferroelectric memory device and method of reducing imprint effect thereof' [patent_app_type] => 1 [patent_app_number] => 9/197347 [patent_app_country] => US [patent_app_date] => 1998-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8964 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/986/05986920.pdf [firstpage_image] =>[orig_patent_app_number] => 197347 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/197347
Ferroelectric memory device and method of reducing imprint effect thereof Nov 18, 1998 Issued
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