
Trong Q Phan
Examiner (ID: 15831, Phone: (571)272-1794 , Office: P/2825 )
| Most Active Art Unit | 2818 |
| Art Unit(s) | 2827, 2511, 2504, 2824, 2825, 2899, 2818 |
| Total Applications | 3077 |
| Issued Applications | 2717 |
| Pending Applications | 50 |
| Abandoned Applications | 311 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4180598
[patent_doc_number] => 06140952
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-10-31
[patent_title] => 'Delta sigma circuit with pulse width modulated offset'
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[patent_app_number] => 9/217872
[patent_app_country] => US
[patent_app_date] => 1998-12-21
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Array
(
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[patent_kind] => NA
[patent_issue_date] => 2000-11-21
[patent_title] => 'Screened EEPROM cell'
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[patent_app_date] => 1998-12-17
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Array
(
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[patent_issue_date] => 2000-07-18
[patent_title] => 'Nonvolatile ferroelectric memory device'
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[patent_app_date] => 1998-12-15
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[firstpage_image] =>[orig_patent_app_number] => 210783
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/210783 | Nonvolatile ferroelectric memory device | Dec 14, 1998 | Issued |
Array
(
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[patent_issue_date] => 2000-09-12
[patent_title] => 'Semiconductor memory device'
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[patent_app_date] => 1998-12-11
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Array
(
[id] => 4197048
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[patent_issue_date] => 2000-07-25
[patent_title] => 'Semiconductor memory device and various systems mounting them'
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Array
(
[id] => 4112409
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[patent_issue_date] => 2000-08-08
[patent_title] => 'Analog-to-digital converter test system and method'
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Array
(
[id] => 4198884
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[patent_issue_date] => 2000-10-10
[patent_title] => 'Rate 24/25 (0,9) code method and system for PRML recording channels'
[patent_app_type] => 1
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[pdf_file] => patents/06/130/06130629.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/205319 | Rate 24/25 (0,9) code method and system for PRML recording channels | Dec 3, 1998 | Issued |
Array
(
[id] => 4166753
[patent_doc_number] => 06114981
[patent_country] => US
[patent_kind] => NA
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[patent_title] => 'D/A converter'
[patent_app_type] => 1
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[patent_app_date] => 1998-12-04
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Array
(
[id] => 4250896
[patent_doc_number] => 06081477
[patent_country] => US
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[patent_issue_date] => 2000-06-27
[patent_title] => 'Write scheme for a double data rate SDRAM'
[patent_app_type] => 1
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Array
(
[id] => 4204870
[patent_doc_number] => 06044032
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[patent_issue_date] => 2000-03-28
[patent_title] => 'Addressing scheme for a double data rate SDRAM'
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Array
(
[id] => 3962114
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Array
(
[id] => 4367154
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Array
(
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[patent_title] => 'Global wordline driver'
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Array
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Array
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Array
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Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/197347 | Ferroelectric memory device and method of reducing imprint effect thereof | Nov 18, 1998 | Issued |