Search

Trong Q. Phan

Examiner (ID: 14718, Phone: (571)272-1794 , Office: P/2825 )

Most Active Art Unit
2818
Art Unit(s)
2511, 2825, 2899, 2818, 2827, 2824, 2504
Total Applications
3077
Issued Applications
2717
Pending Applications
50
Abandoned Applications
311

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4209447 [patent_doc_number] => 06014337 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-11 [patent_title] => 'Semiconductor storage device' [patent_app_type] => 1 [patent_app_number] => 9/192447 [patent_app_country] => US [patent_app_date] => 1998-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3397 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/014/06014337.pdf [firstpage_image] =>[orig_patent_app_number] => 192447 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/192447
Semiconductor storage device Nov 16, 1998 Issued
Array ( [id] => 4116601 [patent_doc_number] => 06023436 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-08 [patent_title] => 'Integrated circuit memory devices having synchronized bit line selection and I/O line precharge capability and methods of operating same' [patent_app_type] => 1 [patent_app_number] => 9/193273 [patent_app_country] => US [patent_app_date] => 1998-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 5673 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/023/06023436.pdf [firstpage_image] =>[orig_patent_app_number] => 193273 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/193273
Integrated circuit memory devices having synchronized bit line selection and I/O line precharge capability and methods of operating same Nov 16, 1998 Issued
Array ( [id] => 3925187 [patent_doc_number] => 06002618 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-14 [patent_title] => 'NMOS input receiver circuit' [patent_app_type] => 1 [patent_app_number] => 9/190040 [patent_app_country] => US [patent_app_date] => 1998-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 26 [patent_no_of_words] => 19918 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/002/06002618.pdf [firstpage_image] =>[orig_patent_app_number] => 190040 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/190040
NMOS input receiver circuit Nov 10, 1998 Issued
Array ( [id] => 4165597 [patent_doc_number] => 06125051 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-26 [patent_title] => 'Circuit for driving nonvolatile ferroelectric memory' [patent_app_type] => 1 [patent_app_number] => 9/187735 [patent_app_country] => US [patent_app_date] => 1998-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 8538 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/125/06125051.pdf [firstpage_image] =>[orig_patent_app_number] => 187735 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/187735
Circuit for driving nonvolatile ferroelectric memory Nov 8, 1998 Issued
Array ( [id] => 4191714 [patent_doc_number] => 06038158 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-14 [patent_title] => 'Semiconductor memory' [patent_app_type] => 1 [patent_app_number] => 9/189071 [patent_app_country] => US [patent_app_date] => 1998-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 6842 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/038/06038158.pdf [firstpage_image] =>[orig_patent_app_number] => 189071 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/189071
Semiconductor memory Nov 8, 1998 Issued
Array ( [id] => 4393159 [patent_doc_number] => 06304485 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-16 [patent_title] => 'Flash EEprom system' [patent_app_type] => 1 [patent_app_number] => 9/188417 [patent_app_country] => US [patent_app_date] => 1998-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 37 [patent_no_of_words] => 18999 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/304/06304485.pdf [firstpage_image] =>[orig_patent_app_number] => 188417 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/188417
Flash EEprom system Nov 8, 1998 Issued
Array ( [id] => 4365154 [patent_doc_number] => 06201555 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-13 [patent_title] => 'Shaft encoder' [patent_app_type] => 1 [patent_app_number] => 9/188192 [patent_app_country] => US [patent_app_date] => 1998-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 1275 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/201/06201555.pdf [firstpage_image] =>[orig_patent_app_number] => 188192 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/188192
Shaft encoder Nov 8, 1998 Issued
Array ( [id] => 3998636 [patent_doc_number] => 05959925 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-28 [patent_title] => 'DRAM incorporating self refresh control circuit and system LSI including the DRAM' [patent_app_type] => 1 [patent_app_number] => 9/184646 [patent_app_country] => US [patent_app_date] => 1998-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6016 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/959/05959925.pdf [firstpage_image] =>[orig_patent_app_number] => 184646 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/184646
DRAM incorporating self refresh control circuit and system LSI including the DRAM Nov 2, 1998 Issued
Array ( [id] => 4154988 [patent_doc_number] => 06031754 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-29 [patent_title] => 'Ferroelectric memory with increased switching voltage' [patent_app_type] => 1 [patent_app_number] => 9/184474 [patent_app_country] => US [patent_app_date] => 1998-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9374 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/031/06031754.pdf [firstpage_image] =>[orig_patent_app_number] => 184474 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/184474
Ferroelectric memory with increased switching voltage Nov 1, 1998 Issued
Array ( [id] => 3962280 [patent_doc_number] => 05999457 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-07 [patent_title] => 'Semiconductor integrated circuit' [patent_app_type] => 1 [patent_app_number] => 9/183646 [patent_app_country] => US [patent_app_date] => 1998-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 7978 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/999/05999457.pdf [firstpage_image] =>[orig_patent_app_number] => 183646 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/183646
Semiconductor integrated circuit Oct 29, 1998 Issued
Array ( [id] => 4045898 [patent_doc_number] => 05943275 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-24 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 9/181787 [patent_app_country] => US [patent_app_date] => 1998-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 21 [patent_no_of_words] => 14969 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/943/05943275.pdf [firstpage_image] =>[orig_patent_app_number] => 181787 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/181787
Semiconductor memory device Oct 27, 1998 Issued
Array ( [id] => 4045701 [patent_doc_number] => 05943262 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-24 [patent_title] => 'Non-volatile memory device and method for operating and fabricating the same' [patent_app_type] => 1 [patent_app_number] => 9/181248 [patent_app_country] => US [patent_app_date] => 1998-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 22 [patent_no_of_words] => 8831 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/943/05943262.pdf [firstpage_image] =>[orig_patent_app_number] => 181248 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/181248
Non-volatile memory device and method for operating and fabricating the same Oct 27, 1998 Issued
Array ( [id] => 4247789 [patent_doc_number] => 06166676 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-26 [patent_title] => 'Correlating device and sliding correlating device using the same' [patent_app_type] => 1 [patent_app_number] => 9/179099 [patent_app_country] => US [patent_app_date] => 1998-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 10197 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/166/06166676.pdf [firstpage_image] =>[orig_patent_app_number] => 179099 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/179099
Correlating device and sliding correlating device using the same Oct 26, 1998 Issued
Array ( [id] => 4092912 [patent_doc_number] => 06163285 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-19 [patent_title] => 'Method of direct current offset cancellation' [patent_app_type] => 1 [patent_app_number] => 9/179779 [patent_app_country] => US [patent_app_date] => 1998-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2886 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/163/06163285.pdf [firstpage_image] =>[orig_patent_app_number] => 179779 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/179779
Method of direct current offset cancellation Oct 26, 1998 Issued
Array ( [id] => 4246470 [patent_doc_number] => 06144328 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-07 [patent_title] => 'Cascaded delta sigma modulators' [patent_app_type] => 1 [patent_app_number] => 9/177394 [patent_app_country] => US [patent_app_date] => 1998-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 3443 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/144/06144328.pdf [firstpage_image] =>[orig_patent_app_number] => 177394 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/177394
Cascaded delta sigma modulators Oct 22, 1998 Issued
Array ( [id] => 4166629 [patent_doc_number] => 06157328 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-05 [patent_title] => 'Method and apparatus for designing a codebook for error resilient data transmission' [patent_app_type] => 1 [patent_app_number] => 9/177781 [patent_app_country] => US [patent_app_date] => 1998-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 22 [patent_no_of_words] => 7719 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/157/06157328.pdf [firstpage_image] =>[orig_patent_app_number] => 177781 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/177781
Method and apparatus for designing a codebook for error resilient data transmission Oct 21, 1998 Issued
Array ( [id] => 4161964 [patent_doc_number] => 06124818 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-26 [patent_title] => 'Pipelined successive approximation analog-to-digital converters' [patent_app_type] => 1 [patent_app_number] => 9/176397 [patent_app_country] => US [patent_app_date] => 1998-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 8 [patent_no_of_words] => 5942 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/124/06124818.pdf [firstpage_image] =>[orig_patent_app_number] => 176397 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/176397
Pipelined successive approximation analog-to-digital converters Oct 20, 1998 Issued
Array ( [id] => 4047845 [patent_doc_number] => 05995417 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-30 [patent_title] => 'Scheme for page erase and erase verify in a non-volatile memory array' [patent_app_type] => 1 [patent_app_number] => 9/175646 [patent_app_country] => US [patent_app_date] => 1998-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 5258 [patent_no_of_claims] => 56 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/995/05995417.pdf [firstpage_image] =>[orig_patent_app_number] => 175646 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/175646
Scheme for page erase and erase verify in a non-volatile memory array Oct 19, 1998 Issued
Array ( [id] => 1479355 [patent_doc_number] => 06344813 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-05 [patent_title] => 'Digital to analogue converter' [patent_app_type] => B1 [patent_app_number] => 09/175783 [patent_app_country] => US [patent_app_date] => 1998-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3827 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/344/06344813.pdf [firstpage_image] =>[orig_patent_app_number] => 09175783 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/175783
Digital to analogue converter Oct 19, 1998 Issued
Array ( [id] => 3963891 [patent_doc_number] => 05978267 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-02 [patent_title] => 'Bit line biasing method to eliminate program disturbance in a non-volatile memory device and memory device employing the same' [patent_app_type] => 1 [patent_app_number] => 9/175647 [patent_app_country] => US [patent_app_date] => 1998-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 6754 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/978/05978267.pdf [firstpage_image] =>[orig_patent_app_number] => 175647 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/175647
Bit line biasing method to eliminate program disturbance in a non-volatile memory device and memory device employing the same Oct 19, 1998 Issued
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