
Trong Q. Phan
Examiner (ID: 14718, Phone: (571)272-1794 , Office: P/2825 )
| Most Active Art Unit | 2818 |
| Art Unit(s) | 2511, 2825, 2899, 2818, 2827, 2824, 2504 |
| Total Applications | 3077 |
| Issued Applications | 2717 |
| Pending Applications | 50 |
| Abandoned Applications | 311 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4209447
[patent_doc_number] => 06014337
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[patent_kind] => NA
[patent_issue_date] => 2000-01-11
[patent_title] => 'Semiconductor storage device'
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[patent_app_date] => 1998-11-17
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Array
(
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[patent_issue_date] => 2000-02-08
[patent_title] => 'Integrated circuit memory devices having synchronized bit line selection and I/O line precharge capability and methods of operating same'
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Array
(
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[patent_issue_date] => 1999-12-14
[patent_title] => 'NMOS input receiver circuit'
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Array
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[patent_issue_date] => 2000-09-26
[patent_title] => 'Circuit for driving nonvolatile ferroelectric memory'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/187735 | Circuit for driving nonvolatile ferroelectric memory | Nov 8, 1998 | Issued |
Array
(
[id] => 4191714
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Array
(
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[patent_title] => 'Flash EEprom system'
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Array
(
[id] => 4365154
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Array
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[patent_doc_number] => 05959925
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[patent_issue_date] => 1999-09-28
[patent_title] => 'DRAM incorporating self refresh control circuit and system LSI including the DRAM'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/184646 | DRAM incorporating self refresh control circuit and system LSI including the DRAM | Nov 2, 1998 | Issued |
Array
(
[id] => 4154988
[patent_doc_number] => 06031754
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[patent_kind] => NA
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[patent_title] => 'Ferroelectric memory with increased switching voltage'
[patent_app_type] => 1
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Array
(
[id] => 3962280
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Array
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Array
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Array
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Array
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Array
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Array
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Array
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Array
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