Search

Trong Q. Phan

Examiner (ID: 14718, Phone: (571)272-1794 , Office: P/2825 )

Most Active Art Unit
2818
Art Unit(s)
2511, 2825, 2899, 2818, 2827, 2824, 2504
Total Applications
3077
Issued Applications
2717
Pending Applications
50
Abandoned Applications
311

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3962228 [patent_doc_number] => 05999454 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-07 [patent_title] => 'Sense amplifier for flash memory' [patent_app_type] => 1 [patent_app_number] => 9/136360 [patent_app_country] => US [patent_app_date] => 1998-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3848 [patent_no_of_claims] => 63 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/999/05999454.pdf [firstpage_image] =>[orig_patent_app_number] => 136360 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/136360
Sense amplifier for flash memory Aug 18, 1998 Issued
Array ( [id] => 4197200 [patent_doc_number] => 06094381 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-25 [patent_title] => 'Semiconductor memory device with redundancy circuit' [patent_app_type] => 1 [patent_app_number] => 9/135560 [patent_app_country] => US [patent_app_date] => 1998-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 3640 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/094/06094381.pdf [firstpage_image] =>[orig_patent_app_number] => 135560 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/135560
Semiconductor memory device with redundancy circuit Aug 17, 1998 Issued
Array ( [id] => 3994164 [patent_doc_number] => 05949730 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-07 [patent_title] => 'Method and apparatus for quickly restoring digit I/O lines' [patent_app_type] => 1 [patent_app_number] => 9/135845 [patent_app_country] => US [patent_app_date] => 1998-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2744 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/949/05949730.pdf [firstpage_image] =>[orig_patent_app_number] => 135845 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/135845
Method and apparatus for quickly restoring digit I/O lines Aug 17, 1998 Issued
Array ( [id] => 3969947 [patent_doc_number] => 05936881 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-10 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 9/135646 [patent_app_country] => US [patent_app_date] => 1998-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 51 [patent_figures_cnt] => 63 [patent_no_of_words] => 19414 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/936/05936881.pdf [firstpage_image] =>[orig_patent_app_number] => 135646 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/135646
Semiconductor memory device Aug 17, 1998 Issued
Array ( [id] => 3988661 [patent_doc_number] => 05917759 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-29 [patent_title] => 'Input interface level determiner for use in a memory device' [patent_app_type] => 1 [patent_app_number] => 9/134158 [patent_app_country] => US [patent_app_date] => 1998-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2035 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/917/05917759.pdf [firstpage_image] =>[orig_patent_app_number] => 134158 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/134158
Input interface level determiner for use in a memory device Aug 13, 1998 Issued
Array ( [id] => 3964005 [patent_doc_number] => 05978275 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-02 [patent_title] => 'Erase and program control state machines for flash memory' [patent_app_type] => 1 [patent_app_number] => 9/133659 [patent_app_country] => US [patent_app_date] => 1998-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 8979 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/978/05978275.pdf [firstpage_image] =>[orig_patent_app_number] => 133659 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/133659
Erase and program control state machines for flash memory Aug 11, 1998 Issued
Array ( [id] => 4230558 [patent_doc_number] => 06040998 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-21 [patent_title] => 'Memory activation devices and methods' [patent_app_type] => 1 [patent_app_number] => 9/132559 [patent_app_country] => US [patent_app_date] => 1998-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 4964 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/040/06040998.pdf [firstpage_image] =>[orig_patent_app_number] => 132559 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/132559
Memory activation devices and methods Aug 10, 1998 Issued
Array ( [id] => 4250590 [patent_doc_number] => 06144595 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-07 [patent_title] => 'Semiconductor device performing test operation under proper conditions' [patent_app_type] => 1 [patent_app_number] => 9/131880 [patent_app_country] => US [patent_app_date] => 1998-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7534 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/144/06144595.pdf [firstpage_image] =>[orig_patent_app_number] => 131880 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/131880
Semiconductor device performing test operation under proper conditions Aug 9, 1998 Issued
Array ( [id] => 4116796 [patent_doc_number] => 06101115 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-08 [patent_title] => 'CAM match line precharge' [patent_app_type] => 1 [patent_app_number] => 9/130747 [patent_app_country] => US [patent_app_date] => 1998-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1658 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/101/06101115.pdf [firstpage_image] =>[orig_patent_app_number] => 130747 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/130747
CAM match line precharge Aug 6, 1998 Issued
Array ( [id] => 3915417 [patent_doc_number] => 05898631 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-27 [patent_title] => 'Semiconductor storage' [patent_app_type] => 1 [patent_app_number] => 9/127555 [patent_app_country] => US [patent_app_date] => 1998-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 1509 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/898/05898631.pdf [firstpage_image] =>[orig_patent_app_number] => 127555 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/127555
Semiconductor storage Aug 2, 1998 Issued
Array ( [id] => 4073456 [patent_doc_number] => 05896339 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-20 [patent_title] => 'Multi-bit block write in a random access memory' [patent_app_type] => 1 [patent_app_number] => 9/146250 [patent_app_country] => US [patent_app_date] => 1998-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4307 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/896/05896339.pdf [firstpage_image] =>[orig_patent_app_number] => 146250 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/146250
Multi-bit block write in a random access memory Aug 2, 1998 Issued
Array ( [id] => 4047804 [patent_doc_number] => 05995414 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-30 [patent_title] => 'Non-volatile semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 9/126810 [patent_app_country] => US [patent_app_date] => 1998-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4286 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/995/05995414.pdf [firstpage_image] =>[orig_patent_app_number] => 126810 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/126810
Non-volatile semiconductor memory device Jul 30, 1998 Issued
Array ( [id] => 4245994 [patent_doc_number] => 06075727 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-13 [patent_title] => 'Method and apparatus for writing an erasable non-volatile memory' [patent_app_type] => 1 [patent_app_number] => 9/124466 [patent_app_country] => US [patent_app_date] => 1998-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 7292 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/075/06075727.pdf [firstpage_image] =>[orig_patent_app_number] => 124466 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/124466
Method and apparatus for writing an erasable non-volatile memory Jul 28, 1998 Issued
Array ( [id] => 4153267 [patent_doc_number] => 06061297 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-09 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 9/123528 [patent_app_country] => US [patent_app_date] => 1998-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7209 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/061/06061297.pdf [firstpage_image] =>[orig_patent_app_number] => 123528 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/123528
Semiconductor memory device Jul 27, 1998 Issued
Array ( [id] => 3932697 [patent_doc_number] => 05914907 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-22 [patent_title] => 'Semiconductor memory device capable of increasing chip yields while maintaining rapid operation' [patent_app_type] => 1 [patent_app_number] => 9/122760 [patent_app_country] => US [patent_app_date] => 1998-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 7338 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/914/05914907.pdf [firstpage_image] =>[orig_patent_app_number] => 122760 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/122760
Semiconductor memory device capable of increasing chip yields while maintaining rapid operation Jul 26, 1998 Issued
Array ( [id] => 4086288 [patent_doc_number] => 05966331 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-12 [patent_title] => 'Block decoded wordline driver with positive and negative voltage modes using four terminal MOS transistors' [patent_app_type] => 1 [patent_app_number] => 9/122258 [patent_app_country] => US [patent_app_date] => 1998-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5880 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/966/05966331.pdf [firstpage_image] =>[orig_patent_app_number] => 122258 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/122258
Block decoded wordline driver with positive and negative voltage modes using four terminal MOS transistors Jul 23, 1998 Issued
Array ( [id] => 3915264 [patent_doc_number] => 05898620 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-27 [patent_title] => 'Method for detecting erroneously programmed memory cells in a memory' [patent_app_type] => 1 [patent_app_number] => 9/120859 [patent_app_country] => US [patent_app_date] => 1998-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2577 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/898/05898620.pdf [firstpage_image] =>[orig_patent_app_number] => 120859 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/120859
Method for detecting erroneously programmed memory cells in a memory Jul 21, 1998 Issued
Array ( [id] => 3953167 [patent_doc_number] => 05973959 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-26 [patent_title] => 'Circuit and method of reading cells of an analog memory array, in particular of the flash type' [patent_app_type] => 1 [patent_app_number] => 9/121024 [patent_app_country] => US [patent_app_date] => 1998-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2568 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/973/05973959.pdf [firstpage_image] =>[orig_patent_app_number] => 121024 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/121024
Circuit and method of reading cells of an analog memory array, in particular of the flash type Jul 21, 1998 Issued
Array ( [id] => 4011954 [patent_doc_number] => 05986930 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-16 [patent_title] => 'Non-volatile semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 9/119826 [patent_app_country] => US [patent_app_date] => 1998-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 8344 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/986/05986930.pdf [firstpage_image] =>[orig_patent_app_number] => 119826 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/119826
Non-volatile semiconductor memory device Jul 20, 1998 Issued
Array ( [id] => 4250881 [patent_doc_number] => 06081476 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-27 [patent_title] => 'Clock-synchronized read-only memory' [patent_app_type] => 1 [patent_app_number] => 9/119955 [patent_app_country] => US [patent_app_date] => 1998-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 3623 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/081/06081476.pdf [firstpage_image] =>[orig_patent_app_number] => 119955 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/119955
Clock-synchronized read-only memory Jul 20, 1998 Issued
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