Search

Trong Q. Phan

Examiner (ID: 14718, Phone: (571)272-1794 , Office: P/2825 )

Most Active Art Unit
2818
Art Unit(s)
2511, 2825, 2899, 2818, 2827, 2824, 2504
Total Applications
3077
Issued Applications
2717
Pending Applications
50
Abandoned Applications
311

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3957270 [patent_doc_number] => 05982676 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-09 [patent_title] => 'Low voltage generator for bitlines' [patent_app_type] => 1 [patent_app_number] => 9/085559 [patent_app_country] => US [patent_app_date] => 1998-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3959 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/982/05982676.pdf [firstpage_image] =>[orig_patent_app_number] => 085559 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/085559
Low voltage generator for bitlines May 25, 1998 Issued
Array ( [id] => 4426418 [patent_doc_number] => 06226214 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-01 [patent_title] => 'Read only memory' [patent_app_type] => 1 [patent_app_number] => 9/082060 [patent_app_country] => US [patent_app_date] => 1998-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3703 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/226/06226214.pdf [firstpage_image] =>[orig_patent_app_number] => 082060 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/082060
Read only memory May 20, 1998 Issued
Array ( [id] => 3962569 [patent_doc_number] => 05999478 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-07 [patent_title] => 'Highly integrated tri-port memory buffers having fast fall-through capability and methods of operating same' [patent_app_type] => 1 [patent_app_number] => 9/082855 [patent_app_country] => US [patent_app_date] => 1998-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 12348 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/999/05999478.pdf [firstpage_image] =>[orig_patent_app_number] => 082855 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/082855
Highly integrated tri-port memory buffers having fast fall-through capability and methods of operating same May 20, 1998 Issued
Array ( [id] => 3964453 [patent_doc_number] => 05978307 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-02 [patent_title] => 'Integrated circuit memory devices having partitioned multi-port memory arrays therein for increasing data bandwidth and methods of operating same' [patent_app_type] => 1 [patent_app_number] => 9/082856 [patent_app_country] => US [patent_app_date] => 1998-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 13580 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/978/05978307.pdf [firstpage_image] =>[orig_patent_app_number] => 082856 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/082856
Integrated circuit memory devices having partitioned multi-port memory arrays therein for increasing data bandwidth and methods of operating same May 20, 1998 Issued
Array ( [id] => 4126842 [patent_doc_number] => 06046941 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-04 [patent_title] => 'Non-volatile semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 9/081072 [patent_app_country] => US [patent_app_date] => 1998-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 4660 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/046/06046941.pdf [firstpage_image] =>[orig_patent_app_number] => 081072 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/081072
Non-volatile semiconductor memory device May 18, 1998 Issued
Array ( [id] => 4194035 [patent_doc_number] => 06021079 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-01 [patent_title] => 'Fast, low cost method of developing code for contact programmable ROMs' [patent_app_type] => 1 [patent_app_number] => 9/076989 [patent_app_country] => US [patent_app_date] => 1998-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 5465 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/021/06021079.pdf [firstpage_image] =>[orig_patent_app_number] => 076989 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/076989
Fast, low cost method of developing code for contact programmable ROMs May 12, 1998 Issued
09/075758 CIRCUIT OF REDUCING THE TRANSMISSION DELAY OF THE REDUNDANCY EVALUATION FOR SYNCHRONOUS DRAM May 10, 1998 Issued
Array ( [id] => 3940490 [patent_doc_number] => 05953282 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-14 [patent_title] => 'Circuit for generating switching control signal' [patent_app_type] => 1 [patent_app_number] => 9/074594 [patent_app_country] => US [patent_app_date] => 1998-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 2027 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/953/05953282.pdf [firstpage_image] =>[orig_patent_app_number] => 074594 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/074594
Circuit for generating switching control signal May 7, 1998 Issued
Array ( [id] => 4234246 [patent_doc_number] => 06011739 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-04 [patent_title] => 'Semiconductor memory' [patent_app_type] => 1 [patent_app_number] => 9/071893 [patent_app_country] => US [patent_app_date] => 1998-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3555 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/011/06011739.pdf [firstpage_image] =>[orig_patent_app_number] => 071893 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/071893
Semiconductor memory May 4, 1998 Issued
Array ( [id] => 4038682 [patent_doc_number] => 05903509 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-11 [patent_title] => 'Memory device with multiple internal banks and staggered command execution' [patent_app_type] => 1 [patent_app_number] => 9/072876 [patent_app_country] => US [patent_app_date] => 1998-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 25 [patent_no_of_words] => 8932 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/903/05903509.pdf [firstpage_image] =>[orig_patent_app_number] => 072876 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/072876
Memory device with multiple internal banks and staggered command execution May 3, 1998 Issued
Array ( [id] => 4170199 [patent_doc_number] => 06157567 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-05 [patent_title] => 'Unlock bypass program mode for non-volatile memory' [patent_app_type] => 1 [patent_app_number] => 9/070160 [patent_app_country] => US [patent_app_date] => 1998-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4113 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/157/06157567.pdf [firstpage_image] =>[orig_patent_app_number] => 070160 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/070160
Unlock bypass program mode for non-volatile memory Apr 29, 1998 Issued
Array ( [id] => 4336084 [patent_doc_number] => 06243850 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-05 [patent_title] => 'Allocation apparatus and method for determining cell allocation of semiconductor circuit' [patent_app_type] => 1 [patent_app_number] => 9/064150 [patent_app_country] => US [patent_app_date] => 1998-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 7818 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/243/06243850.pdf [firstpage_image] =>[orig_patent_app_number] => 064150 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/064150
Allocation apparatus and method for determining cell allocation of semiconductor circuit Apr 21, 1998 Issued
Array ( [id] => 3971039 [patent_doc_number] => 05901091 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-04 [patent_title] => 'Bi-directional data input/output circuit of a synchronous memory device and the method for controlling the same' [patent_app_type] => 1 [patent_app_number] => 9/063371 [patent_app_country] => US [patent_app_date] => 1998-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 3840 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/901/05901091.pdf [firstpage_image] =>[orig_patent_app_number] => 063371 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/063371
Bi-directional data input/output circuit of a synchronous memory device and the method for controlling the same Apr 20, 1998 Issued
Array ( [id] => 3953562 [patent_doc_number] => 05973984 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-26 [patent_title] => 'Static semiconductor memory device with reduced power consumption, chip occupied area and access time' [patent_app_type] => 1 [patent_app_number] => 9/061055 [patent_app_country] => US [patent_app_date] => 1998-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 34 [patent_no_of_words] => 23190 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/973/05973984.pdf [firstpage_image] =>[orig_patent_app_number] => 061055 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/061055
Static semiconductor memory device with reduced power consumption, chip occupied area and access time Apr 15, 1998 Issued
Array ( [id] => 4187917 [patent_doc_number] => 06084816 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-04 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 9/061058 [patent_app_country] => US [patent_app_date] => 1998-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 22 [patent_no_of_words] => 5009 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/084/06084816.pdf [firstpage_image] =>[orig_patent_app_number] => 061058 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/061058
Semiconductor memory device Apr 15, 1998 Issued
Array ( [id] => 3953073 [patent_doc_number] => 05973952 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-26 [patent_title] => 'Embedded DRAM with noise protecting shielding conductor' [patent_app_type] => 1 [patent_app_number] => 9/052273 [patent_app_country] => US [patent_app_date] => 1998-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 7672 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/973/05973952.pdf [firstpage_image] =>[orig_patent_app_number] => 052273 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/052273
Embedded DRAM with noise protecting shielding conductor Mar 29, 1998 Issued
Array ( [id] => 3962009 [patent_doc_number] => 05999440 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-07 [patent_title] => 'Embedded DRAM with noise-protecting substrate isolation well' [patent_app_type] => 1 [patent_app_number] => 9/050674 [patent_app_country] => US [patent_app_date] => 1998-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 7735 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/999/05999440.pdf [firstpage_image] =>[orig_patent_app_number] => 050674 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/050674
Embedded DRAM with noise-protecting substrate isolation well Mar 29, 1998 Issued
Array ( [id] => 4045595 [patent_doc_number] => 05943255 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-24 [patent_title] => 'Read only memory' [patent_app_type] => 1 [patent_app_number] => 9/049558 [patent_app_country] => US [patent_app_date] => 1998-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3120 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/943/05943255.pdf [firstpage_image] =>[orig_patent_app_number] => 049558 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/049558
Read only memory Mar 26, 1998 Issued
09/046672 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE HAVING A BACK GROUND OPERATION MODE Mar 23, 1998 Issued
09/047759 METHOD AND APPARATUS FOR PROGRAMMING ANTI-FUSES USING AN ISOLATED WELL PROGRAMMING CIRCUIT Mar 23, 1998 Issued
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