Search

Trong Q. Phan

Examiner (ID: 14718, Phone: (571)272-1794 , Office: P/2825 )

Most Active Art Unit
2818
Art Unit(s)
2511, 2825, 2899, 2818, 2827, 2824, 2504
Total Applications
3077
Issued Applications
2717
Pending Applications
50
Abandoned Applications
311

Applications

Application numberTitle of the applicationFiling DateStatus
09/045958 THIN-FILM CAPACITOR DEVICE AND RAM DEVICE USING FERROELECTRIC FILM Mar 22, 1998 Issued
09/044172 DATA OUTPUT BUFFER FOR MEMORY DEVICE Mar 18, 1998 Issued
Array ( [id] => 4005329 [patent_doc_number] => 05920516 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-06 [patent_title] => 'Circuit and method for enabling a function in a multiple memory device module' [patent_app_type] => 1 [patent_app_number] => 9/042129 [patent_app_country] => US [patent_app_date] => 1998-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3715 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/920/05920516.pdf [firstpage_image] =>[orig_patent_app_number] => 042129 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/042129
Circuit and method for enabling a function in a multiple memory device module Mar 11, 1998 Issued
09/036867 NOVEL FLASH MEMORY ARRAY AND DECODING ARCHITECTURE Mar 8, 1998 Abandoned
Array ( [id] => 3993800 [patent_doc_number] => 05949705 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-07 [patent_title] => 'DRAM cell, DRAM and method for fabricating the same' [patent_app_type] => 1 [patent_app_number] => 9/035841 [patent_app_country] => US [patent_app_date] => 1998-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 5517 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/949/05949705.pdf [firstpage_image] =>[orig_patent_app_number] => 035841 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/035841
DRAM cell, DRAM and method for fabricating the same Mar 5, 1998 Issued
Array ( [id] => 3962443 [patent_doc_number] => 05999469 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-07 [patent_title] => 'Sense time reduction using midlevel precharge' [patent_app_type] => 1 [patent_app_number] => 9/034965 [patent_app_country] => US [patent_app_date] => 1998-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2766 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/999/05999469.pdf [firstpage_image] =>[orig_patent_app_number] => 034965 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/034965
Sense time reduction using midlevel precharge Mar 3, 1998 Issued
Array ( [id] => 3962311 [patent_doc_number] => 05956280 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-21 [patent_title] => 'Contact test method and system for memory testers' [patent_app_type] => 1 [patent_app_number] => 9/032958 [patent_app_country] => US [patent_app_date] => 1998-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4871 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/956/05956280.pdf [firstpage_image] =>[orig_patent_app_number] => 032958 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/032958
Contact test method and system for memory testers Mar 1, 1998 Issued
Array ( [id] => 3963934 [patent_doc_number] => 05978270 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-02 [patent_title] => 'Semiconductor non-volatile memory device and computer system using the same' [patent_app_type] => 1 [patent_app_number] => 9/029748 [patent_app_country] => US [patent_app_date] => 1998-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 68 [patent_no_of_words] => 22285 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/978/05978270.pdf [firstpage_image] =>[orig_patent_app_number] => 029748 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/029748
Semiconductor non-volatile memory device and computer system using the same Mar 1, 1998 Issued
Array ( [id] => 4012037 [patent_doc_number] => 05986935 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-16 [patent_title] => 'Semiconductor memory device with high voltage generation circuit' [patent_app_type] => 1 [patent_app_number] => 9/031350 [patent_app_country] => US [patent_app_date] => 1998-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 19 [patent_no_of_words] => 5758 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/986/05986935.pdf [firstpage_image] =>[orig_patent_app_number] => 031350 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/031350
Semiconductor memory device with high voltage generation circuit Feb 26, 1998 Issued
Array ( [id] => 4064355 [patent_doc_number] => 05933378 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-03 [patent_title] => 'Integrated circuit having forced substrate test mode with improved substrate isolation' [patent_app_type] => 1 [patent_app_number] => 9/031148 [patent_app_country] => US [patent_app_date] => 1998-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3715 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 27 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/933/05933378.pdf [firstpage_image] =>[orig_patent_app_number] => 031148 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/031148
Integrated circuit having forced substrate test mode with improved substrate isolation Feb 25, 1998 Issued
Array ( [id] => 3924977 [patent_doc_number] => 06002605 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-14 [patent_title] => 'Connecting apparatus, and information processing apparatus' [patent_app_type] => 1 [patent_app_number] => 9/030856 [patent_app_country] => US [patent_app_date] => 1998-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 25 [patent_no_of_words] => 10267 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/002/06002605.pdf [firstpage_image] =>[orig_patent_app_number] => 030856 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/030856
Connecting apparatus, and information processing apparatus Feb 25, 1998 Issued
Array ( [id] => 4054540 [patent_doc_number] => 05909406 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-01 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 9/030671 [patent_app_country] => US [patent_app_date] => 1998-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3187 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/909/05909406.pdf [firstpage_image] =>[orig_patent_app_number] => 030671 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/030671
Semiconductor memory device Feb 24, 1998 Issued
Array ( [id] => 3998387 [patent_doc_number] => 05959907 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-28 [patent_title] => 'Semiconductor memory device having a redundancy circuit' [patent_app_type] => 1 [patent_app_number] => 9/028150 [patent_app_country] => US [patent_app_date] => 1998-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3810 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/959/05959907.pdf [firstpage_image] =>[orig_patent_app_number] => 028150 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/028150
Semiconductor memory device having a redundancy circuit Feb 22, 1998 Issued
09/028956 CONFIGURABLE SRAM FOR FIELD PROGRAMMABLE GATE ARRAY Feb 22, 1998 Issued
09/016274 SEMICONDUCTOR MEMORY Jan 29, 1998 Issued
Array ( [id] => 4078332 [patent_doc_number] => 06009039 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-28 [patent_title] => 'Semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/014976 [patent_app_country] => US [patent_app_date] => 1998-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 51 [patent_figures_cnt] => 65 [patent_no_of_words] => 24355 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/009/06009039.pdf [firstpage_image] =>[orig_patent_app_number] => 014976 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/014976
Semiconductor device Jan 27, 1998 Issued
09/008576 SYNCHRONOUS SEMICONDUCTOR MEMORY DEVICE CAPABLE OF IMPROVING LOAD OF CLOCK SIGNAL LINE Jan 15, 1998 Issued
09/006772 MEMORY HAVING SELECTABLE OUTPUT STRENGTH Jan 13, 1998 Issued
Array ( [id] => 4038574 [patent_doc_number] => 05903501 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-11 [patent_title] => 'Semiconductor device with 3V/5V tolerant output driver' [patent_app_type] => 1 [patent_app_number] => 9/007073 [patent_app_country] => US [patent_app_date] => 1998-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5698 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/903/05903501.pdf [firstpage_image] =>[orig_patent_app_number] => 007073 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/007073
Semiconductor device with 3V/5V tolerant output driver Jan 13, 1998 Issued
Array ( [id] => 4027214 [patent_doc_number] => 05907510 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-25 [patent_title] => 'Write bias generator for column multiplexed static random access memory' [patent_app_type] => 1 [patent_app_number] => 9/002275 [patent_app_country] => US [patent_app_date] => 1997-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 4244 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/907/05907510.pdf [firstpage_image] =>[orig_patent_app_number] => 002275 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/002275
Write bias generator for column multiplexed static random access memory Dec 30, 1997 Issued
Menu